SNVS699I February   2011  – May 2026 LM5045

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  High-Voltage Start-Up Regulator
      2. 6.3.2  Line Undervoltage Detector
      3. 6.3.3  Overvoltage Protection
      4. 6.3.4  Reference
      5. 6.3.5  Oscillator, Sync Input
      6. 6.3.6  Cycle-by-Cycle Current Limit
      7. 6.3.7  Hiccup Mode
      8. 6.3.8  PWM Comparator
      9. 6.3.9  Ramp Pin
      10. 6.3.10 Slope Pin
      11. 6.3.11 Soft-Start
      12. 6.3.12 Gate Driver Outputs
      13. 6.3.13 Synchronous Rectifier Control Outputs (SR1 and SR2)
      14. 6.3.14 Soft-Start of the Synchronous Rectifiers
      15. 6.3.15 Prebias Startup
      16. 6.3.16 Soft-Stop
      17. 6.3.17 Soft-Stop Off
      18. 6.3.18 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Control Method Selection
      2. 6.4.2 Voltage Mode Control Using the LM5045
      3. 6.4.3 Current Mode Control Using the LM5045
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VIN and VCC
        2. 7.2.2.2 For Applications With > 100 VIN
        3. 7.2.2.3 UVLO and OVP Voltage Divider Selection
        4. 7.2.2.4 Current Sense
        5. 7.2.2.5 Hiccup Mode Current Limit Restart
        6. 7.2.2.6 Augmenting the Gate Drive Strength
      3. 7.2.3 Application Curve
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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6.3.9 Ramp Pin

The voltage at the RAMP pin provides the modulation ramp for the PWM comparator. The PWM comparator compares the modulation ramp signal at the RAMP pin to the loop error signal to control the duty cycle. The modulation ramp signal can be implemented either as a ramp proportional to the input voltage, known as feed-forward voltage mode control, or as a ramp proportional to the primary current, known as current mode control. The RAMP pin is reset by an internal MOSFET with an RDS(ON) of 5.5 Ω at the conclusion of each PWM cycle. The ability to configure the RAMP pin for either voltage mode or current mode allows the controller to be implemented for the optimum control method depending upon the design constraints. Refer to the Section 7 section for more details on configuring the RAMP pin for feed-forward voltage mode control and peak current mode control.