ZHCSI27C April   2018  – October 2021 LM5036

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High-Voltage Start-Up Regulator
      2. 7.3.2  Undervoltage Lockout (UVLO)
      3. 7.3.3  Reference Regulator
      4. 7.3.4  Oscillator, Synchronized Input
      5. 7.3.5  Voltage-Mode Control
      6. 7.3.6  Primary-Side Gate Driver Outputs (LSG and HSG)
      7. 7.3.7  Half-Bridge PWM Scheme
      8. 7.3.8  Maximum Duty Cycle Operation
      9. 7.3.9  Pre-Biased Start-Up Process
        1. 7.3.9.1 Primary FETs Soft-Start Process
        2. 7.3.9.2 Synchronous Rectifier (SR) Soft-Start Process
      10. 7.3.10 Zero Duty Cycle Operation
      11. 7.3.11 Enhanced Cycle-by-Cycle Current Limiting with Pulse Matching
      12. 7.3.12 Reverse Current Protection
      13. 7.3.13 CBC Threshold Accuracy
      14. 7.3.14 Hiccup Mode Protection
      15. 7.3.15 Hiccup Mode Blanking
      16. 7.3.16 Over-Temperature Protection (OTP)
      17. 7.3.17 Over-Voltage / Latch (ON_OFF Pin)
      18. 7.3.18 Auxiliary Constant On-Time Control
      19. 7.3.19 Auxiliary On-Time Generator
      20. 7.3.20 Auxiliary Supply Current Limiting
      21. 7.3.21 Auxiliary Primary Output Capacitor Ripple
      22. 7.3.22 Auxiliary Ripple Configuration and Control
      23. 7.3.23 Asynchronous Mode Operation of Auxiliary Supply
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Input Transient Protection
        3. 8.2.2.3  Level-Shift Detection Circuit
        4. 8.2.2.4  Applications with VIN > 100-V
        5. 8.2.2.5  Applications without Pre-Biased Start-Up Requirement
        6. 8.2.2.6  UVLO Voltage Divider Selection
        7. 8.2.2.7  Over Voltage, Latch (ON_OFF Pin) Voltage Divider Selection
        8. 8.2.2.8  SS Capacitor
        9. 8.2.2.9  SSSR Capacitor
        10. 8.2.2.10 Half-Bridge Power Stage Design
        11. 8.2.2.11 Current Limit
        12. 8.2.2.12 Auxiliary Transformer
        13. 8.2.2.13 Auxiliary Feedback Resistors
        14. 8.2.2.14 RON Resistor
        15. 8.2.2.15 VIN Pin Capacitor
        16. 8.2.2.16 Auxiliary Primary Output Capacitor
        17. 8.2.2.17 Auxiliary Secondary Output Capacitor
        18. 8.2.2.18 Auxiliary Feedback Ripple Circuit
        19. 8.2.2.19 Auxiliary Secondary Diode
        20. 8.2.2.20 VCC Diode
        21. 8.2.2.21 Opto-Coupler Interface
        22. 8.2.2.22 Full-Bridge Converter Applications
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
        1. 11.2.1.1 Receiving Notification of Documentation Updates
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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订购信息

Auxiliary Supply Current Limiting

The LM5036 controller contains an intelligent current limit off-timer for the auxiliary supply. If the current in the high-side switch exceeds IAUX(LIM) (200-mA typical), both the high-side MOSFET and the low-side SR are immediately turned off, and a non-resetable off-timer is initiated. The length of the off-time is a function of the FB_AUX pin voltage and the input voltage VIN. As an example, when VFB_AUX = 0 V and VIN = 48 V, a maximum off-time is set to 16 µs. This condition occurs when the output is shorted, and during the initial phase of start-up. This amount of time ensures safe short-circuit operation up to the maximum input voltage of 100 V.

In cases of overload where the FB_AUX voltage is above zero volts (not a short circuit) the current limit off-time is reduced. Reducing the off-time during less severe overloads reduces the amount of foldback, recovery time, and start-up time. The current limit off-time is calculated from Equation 33.

Equation 33. GUID-927966F2-467C-4666-BED1-4B6E63B3EFD2-low.gif

Because the current limit protection feature of the auxiliary supply is peak limited, the maximum average output is less than the peak.

To prevent excessive reverse current during the off-time of the current limit, the auxiliary supply operates in asynchronous (ASYNC) mode where the low-side SR is turned off during current limit operation. The body diode of the internal low-side MOSFET (QB) incurs significant power loss during asynchronous operation. TI recommends adding an external schottky diode (DFW) between the PGND and SW_AUX pins to ensure robust and efficient current limit operation. This schottky diode is particularly important when operating from high input voltage. Use an external schottky diode (DFW) that is rated to carry the maximum auxiliary current and block the maximum input voltage (VIN(max)).

For high density designs it is desirable to use an auxiliary transformer with low magnetising inductance and saturation current. The peak magnetising current flowing in the auxiliary transformer can exceed IAUX(LIM) due to delays in the peak current detection and comparator circuit. The actual peak magnetising current reached is a function of the maximum slope of the transformer magnetising current. This behavior depends upon both maximum input voltage VIN(max) and magnetising inductance value. The method outlined below allows designers to estimate the peak magnetising current that will flow in the Aux transformer (ILPk).

As illustrated in Figure 7-25, it is convenient to model the internal current sense circuit as a simple RC time constant, τAuxSns (41-ns typical), that delays the sensed current signal presented to the OCP comparator input. There is a further delay tAUX(LIM) (116-ns typical), after the comparator input reaches its trip threshold before the OCPb fault flag is set. The controller applies this extended off time, tOFF(ILIM), only if the OCPb fault flag is set before the COT (tON) period ends. Equation 34 is an expression for the sensed and delayed magnetising current inductor signal applied to the non-inverting input of the OCP comparator.

GUID-8953CC84-0B25-43B3-971B-22F25C31A4A8-low.gifFigure 7-25 Aux Current Limit Circuit Model
Equation 34. GUID-057C6EAA-6153-4569-9086-7E4CDED9278F-low.gif

where

  • mAux is the slope of Aux transformer magnetising inductor current during QA on period
  • τAuxSns is the time constant of the internal current sensing circuit feeding the OCP comparator

Maximum peak current occurs when the magnetising inductor current slope has its highest value. This peak occurs at start-up, or when a short circuit is applied across the VAUX1 output, while operating from maximum input voltage (VIN(max)). The maximum inductor current slope is given by Equation 35.

Equation 35. GUID-800F4298-6518-45AC-B378-C9D49336CD70-low.gif

where

  • LAUX is the magnetising inductance of the Aux transformer

For a use case where the inductor current slope is fixed at its maximum value (mAux), the highest peak current occurs when the inductor current at the start of the pulse (ILInit) is just high enough to trip the OCPb flag before the COT period (tON) expires. After this trip occurrs, the controller applies the extended OFF period (tOFF(ILIM)) to reduce the inductor current for subsequent pulses. This condition is given in Equation 36 and is shown graphically in Figure 7-25

Equation 36. GUID-F4F54B60-EF2D-4400-9AB7-F6A4C32142A7-low.gif

where

  • tAUX(LIM) is the time delay between comparator input threshold being achieved and the OCPb flag set

Combining Equation 34 and Equation 36 determines the initial inductor current for a pulse containing the highest peak current Equation 37.

Equation 37. GUID-DED35033-1971-4089-AFA4-ECE649D7295F-low.gif

Equation 38 uses the COT period in Equation 37 for the maximum input voltage.

Equation 38. GUID-28D5ED59-BD78-482B-97A4-BBBE7FEA9D73-low.gif

where

  • KON (9 × 10–11 typical) is an internal constant that defines the COT period for a given VIN and RON

Having calculated ILInit the estimated peak inductor current is given by Equation 39.

Equation 39. GUID-1EABADB2-912C-49D6-919B-23DC4183916B-low.gif

Use this method to ensure that the operation does not exceed the Aux transformer saturation current under transient or fault conditions. This method assumes fixed transformer magnetising inductance. The method provides only a reasonable accuracy if the transformer magnetising inductance has not fallen significantly at the predicted peak current.

To avoid excessive peak magnetising current during transient or fault events, ensure that the COT period (tON) is longer than the response time of the peak current protection circuit. Equation 40 expresses it as a minimum required value for RON .

Equation 40. GUID-59BC51AB-1C3D-42D9-824F-714A289F6462-low.gif