ZHCSKO3B January   2020  – September 2020 BQ25611D

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 说明（续）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Power-On-Reset (POR)
      2. 9.3.2  Device Power Up from Battery without Input Source
      3. 9.3.3  Power Up from Input Source
        1. 9.3.3.1 Power Up REGN LDO
        2. 9.3.3.2 Poor Source Qualification
        3. 9.3.3.3 Input Source Type Detection (IINDPM Threshold)
          1. 9.3.3.3.1 D+/D– Detection Sets Input Current Limit
        4. 9.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 9.3.3.5 Power Up Converter in Buck Mode
        6. 9.3.3.6 HIZ Mode with Adapter Present
      4. 9.3.4  Boost Mode Operation From Battery
      5. 9.3.5  Power Path Management
        1. 9.3.5.1 Narrow VDC Architecture
        2. 9.3.5.2 Dynamic Power Management
        3. 9.3.5.3 Supplement Mode
      6. 9.3.6  Battery Charging Management
        1. 9.3.6.1 Autonomous Charging Cycle
        2. 9.3.6.2 Battery Charging Profile
        3. 9.3.6.3 Charging Termination
        4. 9.3.6.4 Thermistor Qualification
          1. 9.3.6.4.1 JEITA Guideline Compliance During Charging Mode
          2. 9.3.6.4.2 Boost Mode Thermistor Monitor During Battery Discharge Mode
        5. 9.3.6.5 Charging Safety Timer
      7. 9.3.7  Ship Mode and QON Pin
        1. 9.3.7.1 BATFET Disable (Enter Ship Mode)
        2. 9.3.7.2 BATFET Enable (Exit Ship Mode)
        3. 9.3.7.3 BATFET Full System Reset
      8. 9.3.8  Status Outputs ( STAT, INT )
        1. 9.3.8.1 Charging Status Indicator (STAT)
        2. 9.3.8.2 Interrupt to Host ( INT)
      9. 9.3.9  Protections
        1. 9.3.9.1 Voltage and Current Monitoring in Buck Mode
          1. 9.3.9.1.1 Input Over-Voltage Protection (ACOV)
          2. 9.3.9.1.2 System Over-Voltage Protection (SYSOVP)
        2. 9.3.9.2 Voltage and Current Monitoring in Boost Mode
          1. 9.3.9.2.1 Boost Mode Over-Voltage Protection
        3. 9.3.9.3 Thermal Regulation and Thermal Shutdown
          1. 9.3.9.3.1 Thermal Protection in Buck Mode
          2. 9.3.9.3.2 Thermal Protection in Boost Mode
        4. 9.3.9.4 Battery Protection
          1. 9.3.9.4.1 Battery Over-Voltage Protection (BATOVP)
          2. 9.3.9.4.2 Battery Over-Discharge Protection
          3. 9.3.9.4.3 System Over-Current Protection
      10. 9.3.10 Serial Interface
        1. 9.3.10.1 Data Validity
        2. 9.3.10.2 START and STOP Conditions
        3. 9.3.10.3 Byte Format
        4. 9.3.10.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 9.3.10.5 Slave Address and Data Direction Bit
        6. 9.3.10.6 Single Read and Write
        7. 9.3.10.7 Multi-Read and Multi-Write
    4. 9.4 Device Functional Modes
      1. 9.4.1 Host Mode and Default Mode
    5. 9.5 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Input Capacitor and Resistor
        3. 10.2.2.3 Output Capacitor
    3. 10.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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9.3.6.3 Charging Termination

The device terminates a charge cycle when the battery voltage is above the recharge threshold, and the current is below termination current. After the charging cycle is completed, the BATFET turns off. The STAT is asserted HIGH to indicate charging done. The converter keeps running to power the system, and BATFET can turn on again to engage Supplement Mode.

If the device is in IINDPM/VINDPM regulation, or thermal regulation, the actual charging current will be less than the termination value. In this case, termination is temporarily disabled.

When termination occurs, STAT pin goes HIGH. The status register CHRG_STAT is set to 11, and an INT pulse is asserted to the host. Termination can be disabled by writing 0 to EN_TERM bit prior to charge termination.

The termination current is set in REG03[3:0]. Due to the termination current accuracy, the actual termination current may be higher than the termination target. In order to compensate for termination accuracy, a programmable top-off timer can be applied after termination is detected . The top-off timer will follow safety timer constraints, such that if safety timer is suspended, so will the top-off timer. Similarly, if safety timer is doubled, so will the termination top-off timer. TOPOFF_ACTIVE bit reports whether the top off timer is active or not. The host can read CHRG_STAT and TOPOFF_ACTIVE to find out the termination status. STAT pin stays HIGH during top-off timer counting cycle.

Top-off timer gets reset at one of the following conditions:

  1. Charge disable to enable
  2. Charger enters termination
  3. REG_RST register bit is set

The top-off timer settings are read in once termination is detected by the charger. Programming a top-off timer value (01, 10, 11) after termination will have no effect unless a recharge cycle is initiated. The top-off timer will immediately stop if it is disabled (00). An INT is asserted to the host when entering top-off timer segment as well as when top-off timer expires.