ZHCSE41C August   2015  – May 2017 LP8861-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
    1.     系统效率
  3. 3 说明
    1.     简化原理图
  4. 4 修订历史记录
  5. 5 器件比较表
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Internal LDO Electrical Characteristics
    7. 7.7  Protection Electrical Characteristics
    8. 7.8  Power Line FET Control Electrical Characteristics
    9. 7.9  Current Sinks Electrical Characteristics
    10. 7.10 PWM Brightness Control Electrical Characteristics
    11. 7.11 Boost/SEPIC Converter Characteristics
    12. 7.12 Logic Interface Characteristics
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Integrated Boost/SEPIC Converter
      2. 8.3.2 Internal LDO
      3. 8.3.3 LED Current Sinks
        1. 8.3.3.1 Current Sink Configuration
        2. 8.3.3.2 Current Setting
        3. 8.3.3.3 Brightness Control
      4. 8.3.4 Power-Line FET Control
      5. 8.3.5 LED Current Dimming With External Temperature Sensor
      6. 8.3.6 Protection and Fault Detection
        1. 8.3.6.1 Adaptive Boost Control and Functionality of LED Fault Comparators
        2. 8.3.6.2 Overview of the Fault/Protection Schemes
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device States
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application for 4 LED Strings
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 LDO Output Capacitor
          5. 9.2.1.2.5 Diode
          6. 9.2.1.2.6 Power Line Transistor
          7. 9.2.1.2.7 Input Current Sense Resistor
        3. 9.2.1.3 Application Curves
      2. 9.2.2 High Output Current Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 SEPIC Mode Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1 Diode
          2. 9.2.3.2.2 Inductor
        3. 9.2.3.3 Application Curves
      4. 9.2.4 Application with Temperature Based LED Current De-rating
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 第三方产品免责声明
    2. 12.2 文档支持
      1. 12.2.1 相关文档
    3. 12.3 接收文档更新通知
    4. 12.4 社区资源
    5. 12.5 商标
    6. 12.6 静电放电警告
    7. 12.7 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.4.1 Device States

The LP8861-Q1 enters STANDBY mode when the internal LDO output rises above the power-on reset level, VLDO > VPOR_R. In STANDBY mode device is able to detect the VDDIO/EN signal. When VDDIO/EN is pulled high, device powers up. During soft start the external power line FET is opened gradually to limit inrush current. Soft start is followed by boost start, during which time boost voltage is ramped to the initial value. After boost start LED outputs are sensed to detect grounded current sinks. Grounded current sinks are disabled and excluded from the boost voltage control loop.

If a fault condition is detected, the LP8861-Q1 enters FAULT_RECOVERY state. In this state power line FET is switched off and both the boost and LED current sinks are disabled. Fault that cause the device to enter FAULT_RECOVERY are listed in Figure 22. When LED open or short is detected, faulty string is disabled but LP8861-Q1 stays in ACTIVE mode.

LP8861-Q1 state_diagr_SNVSA50.gifFigure 22. State Diagram
LP8861-Q1 start_up_SNVSA50.gifFigure 23. Timing Diagram for the Typical Start-Up and Shutdown