UCC27321
- Industry-Standard Pin-Out With Addition of Enable
Function - High-Peak Current Drive Capability of ±9 A at
theMiller plateau region Using TrueDrive - Efficient Constant Current Sourcing Using a
Unique BiPolar and CMOS Output Stage - TTL/CMOS Compatible Inputs Independent of
Supply Voltage - 20-ns Typical Rise and Fall Times With 10-nF
Load - Typical Propagation Delay Times of 25 ns With
Input Falling and 35 ns With Input Rising - 4-V to 15-V Supply Voltage
- Available in Thermally Enhanced MSOP
PowerPAD™ Package With 4.7°C/W θjc - Rated From –40°C to +105°C
- Pb-Free Finish (CU NIPDAU) on 8-pin SOIC and
PDIP Packages
The UCC2732x/UCC3732x family of high-speed drivers deliver 9 A of peak drive current in an industry standard pinout. These drivers can drive the largest of MOSFETs for systems requiring extreme Miller current due to high dV/dt transitions. This eliminates additional external circuits and can replace multiple components to reduce space, design complexity, and assembly cost. Two standard logic options are offered, inverting (UCC37321) and noninverting (UCC37322).
Using a design that inherently minimizes shoot-through current, the outputs of these can provide high gate drive current where it is most needed at theMiller plateau region during the MOSFET switching transition. A unique hybrid output stage paralleling bipolar and MOSFET transistors (TrueDrive) allows efficient current delivery at low supply voltages. With this drive architecture, UCC3732x can be used in industry standard 6-A, 9-A and many 12-A driver applications. Latch up and ESD protection circuitries are also included. Finally, the UCC3732x provides an enable (ENBL) function to have better control of the operation of the driver applications. ENBL is implemented on pin 3, which was previously left unused in the industry standard pinout. It is internally pulled up to VDD for active high logic and can be left open for standard operation.
In addition to the 8-pin SOIC (D) and 8-pin PDIP (P) package offerings, the UCC3732x also comes in the thermally enhanced but tiny 8-pin MSOP PowerPAD™ (DGN) package. The PowerPAD package drastically lowers the thermal resistance to extend the temperature operation range and improve the long-term reliability.
技术文档
类型 | 项目标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | UCC2732x/UCC3732x Single 9-A High-Speed Low-Side Mosfet Driver With Enable 数据表 (Rev. H) | PDF | HTML | 2015年 10月 12日 | ||
技术文章 | Managing power-supply noise with a 30-V gate driver | 2021年 12月 7日 | ||||
应用手册 | 了解峰值源电流和灌电流 (Rev. A) | 下载英文版本 (Rev.A) | 2020年 4月 29日 | |||
应用手册 | 适用于栅极驱动器的外部栅极电阻器设计指南 (Rev. A) | 下载英文版本 (Rev.A) | 2020年 4月 29日 | |||
应用手册 | Improving Efficiency of DC-DC Conversion through Layout | 2019年 5月 7日 | ||||
更多文献资料 | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 | ||||
技术文章 | How to achieve higher system robustness in DC drives, part 3: minimum input pulse | 2018年 9月 19日 | ||||
技术文章 | How to achieve higher system robustness in DC drives, part 2: interlock and deadtime | 2018年 5月 30日 | ||||
技术文章 | Boosting efficiency for your solar inverter designs | 2018年 5月 24日 | ||||
更多文献资料 | MOSFET 和 IGBT 栅极驱动器电路的基本原理 | 下载最新的英文版本 (Rev.A) | 2018年 4月 17日 |
设计和开发
如需其他信息或资源,请查看下方列表,点击标题即可进入详情页面。
PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®
借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。
在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
TIDA-00663 — 雷达脉冲飞行时间参考设计
封装 | 引脚数 | 下载 |
---|---|---|
HVSSOP (DGN) | 8 | 了解详情 |
PDIP (P) | 8 | 了解详情 |
SOIC (D) | 8 | 了解详情 |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 认证摘要
- 持续可靠性监测
推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。