Migration Between TMS320F2837x and TMS320F2838x
Migration Between TMS320F2837x and TMS320F2838x
This migration guide describes the hardware and software differences to be aware of when moving between the F2837x and F2838x C2000™ MCUs. This document highlights the features that are unique between the two devices for all available packages in a device comparison table. Section 2 discusses hardware considerations when migrating between the F2837x and F2838x devices with the 337-ZWT package. The digital general-purpose input/output (GPIO) comparison tables show pin functionality between the two MCUs. This is a good reference for hardware design and signal routing when considering a move between the two devices. Lastly, the F2838x software support is only in EABI format. The EABI migration is discussed in Section 4.
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All other trademarks are the property of their respective owners.
1 Feature Differences Between F2837x and F2838x
F2838x is based on the F2837x MCU architecture with many new features including a connectivity manager (CM) subsystem that provides additional MIPS for communication stacks. It is possible to migrate between F2838x and F2837x with the caveats in this document taken into account.
NOTE
This comparison guide focuses on the super-set devices: F28388D and F28379D. Other part numbers in this product family have reduced feature support. For details specific to part numbers, see the device-specific data sheet.
1.1 F2837x and F2838x Feature Comparison
The functional block diagram of F2838x is shown in Figure 1, while the feature comparison of the superset part numbers for theF2837x and F2838x devices are shown in Table 1.
Figure 1. F2838x Functional Block Diagram Table 1. F28379D and F28388D (Superset) Device Comparison
| FEATURE (1) | F28388D | F28379D | |
|---|---|---|---|
| C28x Subsystem | |||
| C28x | Number | 2 | |
| Frequency (MHz) | 200 | ||
| Floating-Point Unit (FPU) | 32 bit and 64 bit | 32 bit | |
| VCRC | Yes | - | |
| VCU-II | - | Yes | |
| TMU | Yes – Type 0 | ||
| FINTDIV | Yes | - | |
| CLA | Number | 2 (1 per CPU) – Type 2 | 2 (1 per CPU) – Type 1 |
| Frequency (MHz) | 200 | 200 | |
| C28x Flash | 1MB (512KW)
[512KB(256KW) per CPU] |
1MB (512KW)
[512KB (256KW) per CPU] |
|
| C28x RAM | Dedicated RAM | 24KB (12KW) [12KB (6KW) per CPU] | |
| Local Shared RAM | 64KB (32KW) [32KB
(16KW) per CPU] |
48KB (24KW)
[24KB (12KW) per CPU] |
|
| Global Shared RAM | 128KB (64KW) (Shared between CPUs) | ||
| Total RAM | 216KB (108KW) | 200KB (100KW) | |
| Background Cyclic Redundancy Check (BGCRC) module | 4 (2 per CPU/CLA) | - | |
| Configurable Logic Block (CLB) | 8 tiles | 4 tiles | |
| 32-bit CPU timers | 6 (3 per CPU) | ||
| 6-Channel DMA | 2 (1 per CPU) – Type 0 | ||
| Dual-zone Code Security Module (DCSM) for on-chip flash and RAM | Yes | ||
| Embedded Real-time Analysis and Diagnostic (ERAD) | Yes | - | |
| Dual Clock Comparator (DCC) | Yes | - | |
| EMIF | EMIF1 (16-bit or 32-bit) | 1 | |
| EMIF2 (16-bit) | 1 | ||
| External interrupts | 5 | ||
| GPIO | I/O pins (shared among CPU1, CPU2, and CM) | 169 | |
| Input XBAR | Yes | ||
| Output XBAR | Yes | ||
| Message RAM | C28x CPU1, C28x CPU2, and Cortex-M4 | 24KB (4KB each direction between each of the three pairs) | 4KB [2KB per CPU] |
| C28x CPUs and CLAs | 1KB (256 bytes each direction between each CPU and CLA pair) | ||
| DMAs and CLAs | 1KB (256 bytes each direction between each DMA and CLA pair) | - | |
| Nonmaskable Interrupt Watchdog (NMIWD) timers | 2 (1 per CPU) | ||
| Watchdog (WD) timers | 2 (1 per CPU) | ||
| Connectivity Manager (CM) Subsystem | |||
| Arm®Cortex®-M4 | 125 MHz | - | |
| M4 Flash | 512KB | - | |
| M4 RAM | 96KB | - | |
| Advanced Encryption Standard (AES) Accelerator | 1 | - | |
| CPU timers | 3 | - | |
| Generic Cyclic Redundancy Check (GCRC) module | 1 | - | |
| Memory Protection Unit (MPU) for Cortex-M4, µDMA, and Ethernet DMA | 3 | - | |
| CM Nonmaskable Interrupt (CMNMI) Module | 1 | - | |
| Trace Port Interface Unit (TPIU) | 1 | - | |
| µDMA | 1 | - | |
| Watchdog (WD) timer | 1 | - | |
| C28x Analog Peripherals | |||
| Analog-to-Digital Converter (ADC) (configurable to 12-bit or 16-bit) | 4 | ||
| ADC 16-bit mode | MSPS | 1.1 | |
| Conversion Time (ns) | 915 | ||
| Input channels (single-ended mode) | 24 | - | |
| Input channels (differential mode) | 12 | ||
| ADC 12-bit mode | MSPS | 3.5 | |
| Conversion Time (ns) | 280 | ||
| Input channels (single-ended) | 24 | ||
| Temperature sensor | 1 | ||
| Comparator subsystem (CMPSS) (each CMPSS has two comparators and two internal DACs) | 8 | ||
| Buffered Digital-to-Analog Converter (DAC) | 3 | ||
| C28x Control Peripherals | |||
| eCAP/HRCAP | Total inputs | 7 – Type 1 | 6 – Type 0 |
| Channels with high-resolution capability | 2 | - | |
| ePWM/HRPWM | Total channels | 32 – Type 4 | |
| Channels with high-resolution capability | 16 | ||
| ePWM XBAR | Yes | ||
| eQEP modules | 3 – Type 2 | ||
| SDFM channels | 8 – Type 2 | ||
| C28x Communications Peripherals | |||
| Fast Serial Interface (FSI) RX | 8 – Type 1 | ||
| Fast Serial Interface (FSI) TX | 2 – Type 1 | - | |
| Inter-Integrated Circuit (I2C) | 2 – Type 0 | ||
| Multichannel Buffered Serial Port (McBSP) | 2 – Type 1 | ||
| Power Management Bus (PMBus) | 1 – Type 0 | - | |
| Serial Communications Interface (SCI) | 4 – Type 0 | ||
| Serial Peripheral Interface (SPI) | 4 – Type 2 | 3 – Type 2 | |
| Controller Area Network (CAN) 2.0B | 2 – Type 0 (can be assigned to CPU1, CPU2, or CM) | 2 – Type 0 (can be assigned to CPU1 or CPU2) | |
| Universal Serial Bus (USB) | 1 – Type 0 (can be assigned to CPU1 or CM) | 1 – Type 0 (only on CPU1) | |
| uPP | - | 1 | |
| Connectivity Manager (CM) Communications Peripherals | |||
| CAN with Flexible Data-Rate (CAN-FD) | 1 | - | |
| Ethernet for Control Automation Technology (EtherCAT) | 1 (can be assigned to CPU1 or CM) | - | |
| Ethernet Media Access Controller (EMAC) | 1 | - | |
| CM Inter-Integrated Circuit (CM-I2C) | 1 | - | |
| Synchronous Serial Interface (SSI) | 1 | - | |
| CM Universal Asynchronous Receiver-Transmitter (CM-UART) | 1 | - | |
| Package Options | |||
| Package Options | 337-Ball ZWT | Yes | |
| 176-Pin PTP | future | Yes | |
| 100-Pin PZP | No | Yes | |
- A type change represents a major functional feature difference in a peripheral module. Within a peripheral type, there may be minor differences between devices that do not affect the basic functionality of the module. For more information, see the C2000 Real-Time Control Peripherals Reference Guide.
2 PCB Hardware Changes
This section describes considerations to take when switching boards between the F2837x and F2838x devices.
2.1 VDD Pin
The F2838x requires a 56 Ω resistor between VDD and VSS. If a F2837x PCB design needs to be reused for F2838x without PCB modification, it is acceptable to replace a single VDD decoupling capacitor with a 56 Ω resistor.
2.2 VREGENZ Pin
Internal VREG is not supported on the F2838x device. Pin that has VREGENZ functions on F2837x is not internally connected on F2838x. It may be left open or connected to any voltage within the maximum operating conditions.
2.3 Analog Pin Assignment
Analog pin mapping on F2838x is the same as that on F2837x. For analog pin connections, see the guidelines provided in the TMS320F2838x Microcontrollers With Connectivity Manager Data Manual.
