SPRACP5 December   2019 TMS320F2802-Q1 , TMS320F28020 , TMS320F280200 , TMS320F28021 , TMS320F28022 , TMS320F28022-Q1 , TMS320F280220 , TMS320F28023 , TMS320F28023-Q1 , TMS320F280230 , TMS320F28026 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027 , TMS320F28027-Q1 , TMS320F280270 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28030 , TMS320F28030-Q1 , TMS320F28031 , TMS320F28031-Q1 , TMS320F28032 , TMS320F28032-Q1 , TMS320F28033 , TMS320F28033-Q1 , TMS320F28034 , TMS320F28034-Q1 , TMS320F28035 , TMS320F28035-EP , TMS320F28035-Q1 , TMS320F28050 , TMS320F28051 , TMS320F28052 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28053 , TMS320F28054 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F28055 , TMS320F2806-Q1 , TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1

 

  1.   C2000 ADC (Type-3) Performance Versus ACQPS
    1.     Trademarks
    2. 1 Introduction
    3. 2 Offset Error
    4. 3 Gain Error
    5. 4 Linearity Error
      1. 4.1 Differential Non-Linearity Error
      2. 4.2 Integral Non-Linearity Error
    6. 5 Summary
    7. 6 References
  2.   A DC Code Spread
    1.     A.1 Overview
    2.     A.2 Method
  3.   B Calculating DNL Error
    1.     B.1 Histogram Method

Summary

This application report outlined the relationship between ACQPS values and ADC performance. More specifically, it explained the extent of error the valid and non-valid ACQPS values may have under different operational conditions. Based on the data presented through this document, non-valid ACQPS values will lead to an offset, gain, and/or linearity error outside the data sheet specifications due to the internal design of a type 3 ADC. ACQPS values categorized as non-valid for overlap and non-overlap modes should be avoided, and self-calibration should be performed in order to adhere to data sheet limits.

The parameters and settings discussed in this document will depend on the system design and configuration, but should be accounted for when trying to maximize the ADC's performance. Thus, in order to reduce the offset, gain, and linearity error with the valid ACQPS values an analog supply voltage between the typical and maximum values is desired as well as an operational temperature close to the typical value. The optimal ADC operating frequency to reduce error is 30 MHz, for which all ACQPS values are valid. Lastly, setting the ADC to operate in non-overlap mode will provide a larger set of ACQPS selection and reduce the risk of error.