SPNA239 September   2019 RM46L440 , RM46L450 , RM46L830 , RM46L840 , RM46L850 , RM46L852 , RM48L530 , RM48L540 , RM48L730 , RM48L740 , RM48L940 , RM48L950 , RM48L952 , RM57L843 , TMS570LC4357 , TMS570LC4357-EP , TMS570LC4357-SEP , TMS570LS0232 , TMS570LS0332 , TMS570LS0432 , TMS570LS10106 , TMS570LS10116 , TMS570LS10206 , TMS570LS1114 , TMS570LS1115 , TMS570LS1224 , TMS570LS1225 , TMS570LS1227 , TMS570LS20206 , TMS570LS20206-EP , TMS570LS20216 , TMS570LS20216-EP , TMS570LS2124 , TMS570LS2125 , TMS570LS2134 , TMS570LS2135 , TMS570LS3134 , TMS570LS3135 , TMS570LS3137 , TMS570LS3137-EP

 

  1.   HALCoGen Ethernet Driver With lwIP Integration Demo and Active Web Server Demo
    1.     Trademarks
    2. 1 Introduction
    3. 2 Supported Features
    4. 3 Get the Software
    5. 4 Configuring EMAC and MDIO Using HALCoGen GUI for the lwIP Demo
      1. 4.1 RM46x, RM48x and TMS570LSx HDK
      2. 4.2 TMS570LC43x and RM57x HDK
      3. 4.3 RM57x Launchpad (LAUNCHXL2 RM57x)
      4. 4.4 TMS570LC43 Launchpad (LAUNCHXL2 570LC43x)
    6. 5 Additional Changes for Active Web Server Demo
      1. 5.1 HALCoGen Configuration Changes
      2. 5.2 lwIP Port Changes
      3. 5.3 CCS Project Structure
      4. 5.4 Changing the Web Pages Rendered by Web Server
    7. 6 Programming Sequence Using HALCoGen Generated Drivers
    8. 7 Design of lwIP Integration
      1. 7.1 Hardware Abstraction Layer
      2. 7.2 lwIP Interface Layer
      3. 7.3 Hercules Development Network Interface Layer
        1. 7.3.1 Network Device Initialization
        2. 7.3.2 Packet Data Transmission
        3. 7.3.3 Packet Data Reception
      4. 7.4 lwIP Application Layer
      5. 7.5 System Application Layer
    9. 8 Release Folder Structure
    10. 9 Run the Test
      1. 9.1 Hardware Setup
      2. 9.2 Building and Executing the lwIP Demo
      3. 9.3 Building and Executing the Active Web Server Demo
        1. 9.3.1 I/O Control Demo 1
        2. 9.3.2 I/O Control Demo 2

1 Introduction

The Ethernet Media Access Controller (EMAC) and Management Data Input/Output (MDIO) peripherals on the Hercules line of devices provide a full-featured Ethernet interface. The EMAC peripheral conforms to the IEEE 802.3 standard, describing the Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer specifications. The EMAC module provides an efficient interface between the processor and a local network. The EMAC supports 10Base-T (10 Mbps) and 100BaseTX (100 Mbps), in half-duplex and full-duplex modes. The EMAC control module provides an interface from the CPU to the EMAC and MDIO modules. The EMAC control module controls device interrupts and incorporates an 8KB internal RAM to hold EMAC buffer descriptors, which is also known as Communications Port Programming Interface (CPPI) RAM. The MDIO module implements the 802.3 serial management interface to interrogate and control up to 32 Ethernet PHYs connected to the device by using a shared two-wire bus. Applications can use the MDIO module to configure the auto negotiation parameters of each PHY attached to the EMAC, retrieve the negotiation results, and configure required parameters in the EMAC module for correct operation.

The EMAC driver code is part of the HALCoGen release and APIs for EMAC and MDIO are listed in include/emac.h and include/mdio.h, respectively.