SLVA704 June   2015 INA209 , INA219 , INA220 , INA220-Q1 , INA223 , INA226 , INA226-Q1 , INA228 , INA228-Q1 , INA230 , INA231 , INA233 , INA234 , INA237 , INA237-Q1 , INA238 , INA238-Q1 , INA3221 , INA3221-Q1 , LM8323 , LM8325-1 , LM8327 , LM8328 , LM8330 , LM8333 , LM8335 , OPT3001 , OPT3004 , P82B715 , P82B96 , PCA9306 , PCA9306-Q1 , PCA9515A , PCA9515B , PCA9518 , PCA9534 , PCA9534A , PCA9535 , PCA9536 , PCA9538 , PCA9539 , PCA9543A , PCA9544A , PCA9545A , PCA9546A , PCA9548A , PCA9554 , PCA9554A , PCA9555 , PCA9557 , PCF8574 , PCF8574A , PCF8575 , PCF8575C , TCA4311A , TCA5405 , TCA6408A , TCA6416A , TCA6418E , TCA6424A , TCA6507 , TCA8418 , TCA8418E , TCA8424 , TCA9406 , TCA9509 , TCA9517 , TCA9517A , TCA9534 , TCA9534A , TCA9535 , TCA9538 , TCA9539 , TCA9539-Q1 , TCA9543A , TCA9544A , TCA9545A , TCA9546A , TCA9548A , TCA9554 , TCA9554A , TCA9555 , TCA9617A , TCA9617B , TCA9800 , TCA9801 , TCA9802 , TCA9803

 

  1.   Understanding the I2C Bus
    1.     Trademarks
    2. 1 Electrical Characteristics
      1. 1.1 Open-Drain for Bidirectional Communication
        1. 1.1.1 Open-Drain Pulling Low
        2. 1.1.2 Open-Drain Releasing Bus
    3. 2 I2C Interface
      1. 2.1 General I2C Operation
        1. 2.1.1 START and STOP Conditions
        2. 2.1.2 Repeated START Condition
      2. 2.2 Data Validity and Byte Format
      3. 2.3 Acknowledge (ACK) and Not Acknowledge (NACK)
    4. 3 I2C Data
      1. 3.1 Writing to a Slave On The I2C Bus
      2. 3.2 Reading From a Slave On The I2C Bus

2.1 General I2C Operation

The I2C bus is a standard bidirectional interface that uses a controller, known as the master, to communicate with slave devices. A slave may not transmit data unless it has been addressed by the master. Each device on the I2C bus has a specific device address to differentiate between other devices that are on the same I2C bus. Many slave devices will require configuration upon startup to set the behavior of the device. This is typically done when the master accesses the slave's internal register maps, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read.

The physical I2C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to VCC through a pull-up resistor. The size of the pull-up resistor is determined by the amount of capacitance on the I2C lines (for further details, refer to I2C Pull-up Resistor Calculation (SLVA689). Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition.

The general procedure for a master to access a slave device is the following:

  1. Suppose a master wants to send data to a slave:
    • Master-transmitter sends a START condition and addresses the slave-receiver
    • Master-transmitter sends data to slave-receiver
    • Master-transmitter terminates the transfer with a STOP condition
  2. If a master wants to receive/read data from a slave:
    • Master-receiver sends a START condition and addresses the slave-transmitter
    • Master-receiver sends the requested register to read to slave-transmitter
    • Master-receiver receives data from the slave-transmitter
    • Master-receiver terminates the transfer with a STOP condition