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参数

Features Buffer Frequency (Max) (kHz) 400 VCCA (Min) (V) 2.3 VCCA (Max) (V) 3.6 VCCB (Min) (V) 2.3 VCCB (Max) (V) 3.6 Supply restrictions VCC Single Supply Approx. price (US$) 0.46 | 1ku Rating Catalog Operating temperature range (C) -40 to 85 open-in-new 查找其它 I2C 电平转换器、缓冲器和集线器

特性

  • Two-Channel Bidirectional Buffers
  • I2C Bus and SMBus Compatible
  • Active-High Repeater-Enable Input
  • Open-Drain I2C I/O
  • 5.5-V Tolerant I2C I/O and Enable Input Support Mixed-Mode Signal Operation
  • Lockup-Free Operation
  • Accommodates Standard Mode and Fast Mode I2C Devices and Multiple Masters
  • Powered-Off High-Impedance I2C Pins
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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描述

This dual bidirectional I2C buffer is operational at 2.3-V to 3.6-V VCC.

The PCA9515A is a BiCMOS integrated circuit intended for I2C bus and SMBus systems applications. The device contains two identical bidirectional open-drain buffer circuits that enable I2C and similar bus systems to be extended without degradation of system performance.

The PCA9515A buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus, while retaining all the operating modes and features of the I2C system. This enables two buses of 400-pF bus capacitance to be connected in an I2C application.

The I2C bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515A enables the system designer to isolate two halves of a bus, accommodating more I2C devices or longer trace lengths.

The PCA9515A has an active-high enable (EN) input with an internal pullup, which allows the user to select when the repeater is active. This can be used to isolate a badly behaved slave on power-up reset. It never should change state during an I2C operation, because disabling during a bus operation hangs the bus, and enabling part way through a bus cycle could confuse the I2C parts being enabled. The EN input should change state only when the global bus and the repeater port are in an idle state, to prevent system failures.

The PCA9515A also can be used to run two buses: one at 5-V interface levels and the other at 3.3-V interface levels, or one at 400-kHz operating frequency and the other at 100-kHz operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be isolated when the 400-kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum system operating frequency may be less than 400 kHz, because of the delays that are added by the repeater.

The PCA9515A does not support clock stretching across the repeater.

The output low levels for each internal buffer are approximately 0.5 V, but the input voltage of each internal buffer must be 70 mV or more below the output low level, when the output internally is driven low. This prevents a lockup condition from occurring when the input low condition is released.

Two or more PCA9515A devices cannot be used in series. The PCA9515A design does not allow this configuration. Because there is no direction pin, slightly different valid low-voltage levels are used to avoid lockup conditions between the input and the output of each repeater. A valid low applied at the input of a PCA9515A is propagated as a buffered low with a slightly higher value on the enabled outputs. When this buffered low is applied to another PCA9515A-type device in series, the second device does not recognize it as a valid low and does not propagate it as a buffered low again.

The device contains a power-up control circuit that sets an internal latch to prevent the output circuits from becoming active until VCC is at a valid level (VCC = 2.3 V).

As with the standard I2C system, pullup resistors are required to provide the logic high levels on the buffered bus. The PCA9515A has standard open-collector configuration of the I2C bus. The size of these pullup resistors depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to work with Standard Mode and Fast Mode I2C devices in addition to SMBus devices. Standard Mode I2C devices only specify 3 mA in a generic I2C system where Standard Mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used.

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技术文档

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类型 标题 下载最新的英文版本 发布
* 数据表 Dual Bidirectional I2C Bus and SMBus Repeater 数据表 2014年 6月 12日
应用手册 Why, When, and How to use I2C Buffers 2018年 5月 23日
应用手册 AR without a name 2016年 9月 7日
应用手册 Understanding the I2C Bus 2015年 6月 30日
应用手册 Maximum Allowed Frequency on I2C Bus Using Repeaters 2015年 5月 15日
应用手册 I2C Bus Pull-Up Resistor Calculation 2015年 2月 13日
选择指南 逻辑器件指南 2014 (Rev. AA) 下载最新的英文版本 (Rev.AB) 2014年 11月 17日
选择指南 I2C 指南 (Rev. C) 下载最新的英文版本 (Rev.E) 2011年 5月 26日
选择指南 逻辑器件指南 2009 (Rev. Z) 下载最新的英文版本 (Rev.AB) 2010年 7月 7日
应用手册 Troubleshooting I2C 2009年 10月 19日
应用手册 Programming Fun Lights With TI's TCA6507 2007年 11月 30日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

设计工具和仿真

仿真模型 下载
SCEJ213.ZIP (216 KB) - HSpice Model
仿真工具 下载
document-generic 用户指南 document-generic 下载英文版本 (Rev.A)
设计工具 下载
I2C designer tool
I2C-DESIGNER — 利用 I2C 设计器工具,可快速解决基于 I2C 设计中寻址、电压电平和频率方面的冲突。输入主输入端和从输入端,以自动生成 I2C 树活轻松构建自定义解决方案。此工具可在调试缺失确认、选择上拉电阻器和满足 I2C 总线最大容性负载方面提供指导,从而帮助设计人员节省时间并遵循 I2C 标准。
特性
  • 基于 GUI 的网络应用
  • 可导出式设计
  • JSON 文件上传程序
  • 物料清单发生器

参考设计

参考设计 下载
用于智能电网应用的精确温度、光感应和诊断参考设计
TIDA-00811 — 该参考设计提供精确的环境光强度测量,用于以 1ms 的快速响应检测弧闪故障,从而保护配电开关设备或最大程度地减小其损坏。该设计还精确地监控(使用开关、模拟、数字或远程)、湿度、灰尘和压力,从而在线监控汇流条、变压器和电容器组,及早指示错误、隔离故障或老化,以便延长运行寿命。该设计提供用于在低负载电流期间在 1ms 内诊断环境光传感器 (ALS) 的独特诊断方法,以提高系统可靠性。这些传感器能够通过 I2C 或低功耗无线接口连接到微控制器,以执行天气发送器功能,从而实现持续在线监控,进而简化系统设计。
document-generic 原理图 document-generic 用户指南 document-generic 下载英文版本

CAD/CAE 符号

封装 引脚 下载
SOIC (D) 8 视图选项
SON (DRG) 8 视图选项
TSSOP (PW) 8 视图选项
VSSOP (DGK) 8 视图选项

订购与质量

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