SLUUCC4A October   2020  – September 2021 TPS92520-Q1

 

  1.   Trademarks
  2.   General Texas Instruments High Voltage Evaluation (TI HV EMV) User Safety Guidelines
  3. 1Description
    1. 1.1 Typical Applications
    2. 1.2 Warnings
    3. 1.3 Connector Description
  4. 2Performance Specifications
  5. 3Performance Data and Typical Characteristic Curves
    1. 3.1 1.5A CC BUCK SW-Node Voltage Waveform
    2. 3.2 Start-up Waveforms
    3. 3.3 PWM Dimming
  6. 4Schematic, PCB Layout, and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Layout
    3. 4.3 Bill of Materials
  7. 5Software
    1. 5.1 Demonstration Kit Software Installation for LEDMCUEVM-132 Board
      1. 5.1.1 Installation Overview
    2. 5.2 Step-by-Step Installation Instructions
    3. 5.3 Installation Error Recovery
    4. 5.4 Checking for Updates
  8. 6TPS92520EVM-133 Power Up and Operation
    1. 6.1 Power Up and Operation at VINx < 40 V
    2. 6.2 MCU Control Window
    3. 6.3 SPI Command Window
    4. 6.4 Watchdog Window
    5. 6.5 GUI Devices Window
      1. 6.5.1 Channel 1 or 2 Sub-Window: Settings, Measurements, and Faults
      2. 6.5.2 Device Sub-Window: Shared Device Settings, Measurements, Register Info, and Limp Home
    6. 6.6 Limp Home Mode Window
  9. 7Revision History

Typical Applications

This document outlines the operation and implementation of the TPS92520-Q1 as dual-synchronous buck constant current (CC) LED driver with the specifications listed in Table 2-1. For applications with a different input voltage range or different output voltage range, see the TPS92520-Q1 4.5-V to 65-V Dual 1.6-A Synchronous Buck LED Driver with SPI Control Data Sheet. The LEDMCUEVM-132 Development Tool controls the TPS92520EVM-133 evaluation board. The LEDMCUEVM-132 is available on TI website. Alternatively, any SPI controller board can control the TPS92520EVM-133. After the LED MCU EVM board is obtained from the TI website, the board must be programmed according to the instructions provided in this design guide. The program instructions are provided in Section 5.