SFFSAY3 January   2026 F29H850TU , F29H859TU-Q1 , TMCS1123 , TMCS1123-Q1 , TPS650362-Q1 , TPS650365-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Background
    2. 1.2 HW/SW FuSa Analysis Process
      1. 1.2.1 Item Definition
      2. 1.2.2 Functional Safety Goal
      3. 1.2.3 Functional Safety Concept
      4. 1.2.4 Technical Safety Concept
      5. 1.2.5 HW/SW Safety Requirement
      6. 1.2.6 Dependent‑failure Analysis
    3. 1.3 TI Collaterals
      1. 1.3.1 TI Components Category
      2. 1.3.2 FuSa Collaterals for Safety MCU
  5. 2FuSa Concepts of OBC System
    1. 2.1 Item Definition
      1. 2.1.1 Item Functions
      2. 2.1.2 System Boundaries
      3. 2.1.3 External Interfaces
      4. 2.1.4 Operation Modes
    2. 2.2 Functional Safety Goal
    3. 2.3 Functional Safety Concept
    4. 2.4 Technical Safety Concept
    5. 2.5 HW/SW Safety Requirement
    6. 2.6 Dependent‑Failure Analysis
  6. 3FuSa Components of OBC System
    1. 3.1 Components Overview
    2. 3.2 Microcontroller
      1. 3.2.1 CPU
      2. 3.2.2 ADC Sample
      3. 3.2.3 PWM Generation
      4. 3.2.4 CMPSS
      5. 3.2.5 Data Transmission
      6. 3.2.6 Fault Signal Monitor and Safe State Control
    3. 3.3 Power Management IC
      1. 3.3.1 MCU Monitor
      2. 3.3.2 Shutdown Sequence
      3. 3.3.3 Power Supply
    4. 3.4 System Basis Chips
      1. 3.4.1 CAN Communication
      2. 3.4.2 Supply Voltage Rail Monitoring
      3. 3.4.3 SPI/Processor Communication
      4. 3.4.4 Device Internal EEPROM
    5. 3.5 Power Supply and Supervisor
    6. 3.6 Gate Driver
    7. 3.7 Voltage Sensor
    8. 3.8 Current Sensor
    9. 3.9 Temperature Sensor
  7. 4Summary
  8. 5References

1.2.5 HW/SW Safety Requirement

The fifth step is to derive the specification of hardware safety requirement (HSR) and software safety requirement (SSR). Both sets of requirements are traceable from the original functional‑safety requirement, carry the same ASIL, and together constitute concrete, verifiable safety features.

HSRs are those TSRs that specify how a hardware element must behave so that the FSR assigned to it is satisfied. This is obtained in the TSC by analyzing the FSR with FTA, FMEDA, or FMEA. The HSR is always traced back to a single FSR and inherits the ASIL.

SSRs are those TSRs that define the behavior, quality, and verification criteria a software unit must satisfy to fulfill the allocated FSR. This is obtained in the TSC by mapping each FSR to software functions and then analyzing the possible software failure modes. The SSR inherits the ASIL of the associated FSR.

Hardware-software interface (HSI) is the set of safety-critical connections that specifies information cross the hardware‑software boundary. HSI is introduced in the TSC and then implemented in HSR and SSR, which is important in proving that hardware‑software boundary is explicit, deterministic, and independently verifiable.