Consider the following system power requirements: V_IN = 5 V, V_OUT = 4 V, and I_LOAD = 2.5 A. The system noise requirement is 0.275 uV_RMS, we need the PSRR to be at least 10 dB at 1 MHz, and the additional load regulation can be as high as 40 mV. We select the TPS7A94 LDO to be paralleled to meet the ultra low noise system specification. We enter these system requirements into the system architecture calculator [see reference 5]. As shown in Figure 4-1 we need at least 3 parallel TPS7A94 LDOs to meet these system requirements.

These results do not include PSRR, which must be assessed separately. A review of the TPS7A94 data sheet reveals plenty of margin in the PSRR curves to the system 10 dB requirement at 1 MHz. Thus the PSRR specification will not change the results in Figure 4-1. If desired, a statistical analysis on V_LOAD and I_OUTn can be completed as discussed in Section 3.

Figure 4-1 Parallel LDO System Requirement Analysis using the TPS7A94 LDO