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线性和低压降 (LDO) 稳压器

TPS7A53

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3A、低输入电压 (1.1V)、低噪声、高精度、超低压降 (LDO) 稳压器

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open-in-new 比较替代产品
功能优于比较器件，可直接替换。
TPS7A53B 正在供货 具有 0.5V 低 VREF 的 3A、1.1V、低输入电压、低噪声、高精度、超低压降稳压器 Wider output voltage range, down to 0.5V
功能与比较器件相同但引脚有所不同。
TPS7A84A 正在供货 具有电源正常指示功能的 3A、低输入电压 (1.1V)、低噪声、高精度、超低压降稳压器 Low noise 3-A LDO with ANY-OUT programming.
TPS7A53-Q1 正在供货 汽车类 3A、低输入电压 (1.1V)、低噪声、高精度、超低压降 (LDO) 稳压器 Low noise 3-A LDO with an extended temperature range.

TPS7A53

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产品详情

Rating Catalog Vin (max) (V) 6.5 Vin (min) (V) 1.1 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 5.15 Vout (min) (V) 0.8 Noise (µVrms) 4.4 PSRR at 100 KHz (dB) 35 Iq (typ) (mA) 2.8 Features Enable, Foldback Overcurrent protection, Output discharge, Power good, Soft start Thermal resistance θJA (°C/W) 46.5 Load capacitance (min) (µF) 22 Regulated outputs (#) 1 Accuracy (%) 0.5 Dropout voltage (Vdo) (typ) (mV) 60 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 6.5 Vin (min) (V) 1.1 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 5.15 Vout (min) (V) 0.8 Noise (µVrms) 4.4 PSRR at 100 KHz (dB) 35 Iq (typ) (mA) 2.8 Features Enable, Foldback Overcurrent protection, Output discharge, Power good, Soft start Thermal resistance θJA (°C/W) 46.5 Load capacitance (min) (µF) 22 Regulated outputs (#) 1 Accuracy (%) 0.5 Dropout voltage (Vdo) (typ) (mV) 60 Operating temperature range (°C) -40 to 125
VQFN-HR (RPS) 12 5.5 mm² (2.5 mm × 2.2 mm)
  • 0.5% (max) accuracy over line, load, and temperature with BIAS
  • Output voltage noise: 4.4 µVRMS
  • Low dropout: 110 mV (max) at 3 A with BIAS
  • Power-supply rejection ratio:
    • 40 dB at 500 kHz
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Adjustable output voltage range: 0.8 V to 5.2 V
  • Adjustable soft-start inrush control
  • Open-drain, power-good (PG) output
  • 2.2-mm × 2.5-mm, 12-pin VQFN package
  • 0.5% (max) accuracy over line, load, and temperature with BIAS
  • Output voltage noise: 4.4 µVRMS
  • Low dropout: 110 mV (max) at 3 A with BIAS
  • Power-supply rejection ratio:
    • 40 dB at 500 kHz
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • Adjustable output voltage range: 0.8 V to 5.2 V
  • Adjustable soft-start inrush control
  • Open-drain, power-good (PG) output
  • 2.2-mm × 2.5-mm, 12-pin VQFN package

The TPS7A53 is a low-noise (4.4 µVRMS), ultra-low dropout linear-regulator (LDO) capable of sourcing 3 A with only 110 mV of maximum dropout. The device output voltage is adjustable from 0.8 V to 5.2 V using an external resistor divider.

The combination of low noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A53 an excellent choice to power noise-sensitive components such as those found in high-speed communications, video, medical, or test-and-measurement applications. The high performance of this device limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Specifically, RF amplifiers benefit from the high performance and
5.2-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.5% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A53 provides optimal system performance.

As an adjustable voltage regulator, there is versatility in the design of the TPS7A53 that makes the device a component of choice for analog loads such as VCO, ADC, DAC, and imaging sensors and for digital loads such as SerDes, FPGAs, and DSPs.

The TPS7A53 is a low-noise (4.4 µVRMS), ultra-low dropout linear-regulator (LDO) capable of sourcing 3 A with only 110 mV of maximum dropout. The device output voltage is adjustable from 0.8 V to 5.2 V using an external resistor divider.

The combination of low noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A53 an excellent choice to power noise-sensitive components such as those found in high-speed communications, video, medical, or test-and-measurement applications. The high performance of this device limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), and digital-to-analog converters (DACs). Specifically, RF amplifiers benefit from the high performance and
5.2-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.5% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A53 provides optimal system performance.

As an adjustable voltage regulator, there is versatility in the design of the TPS7A53 that makes the device a component of choice for analog loads such as VCO, ADC, DAC, and imaging sensors and for digital loads such as SerDes, FPGAs, and DSPs.
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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 TPS7A53 3-A, High-Accuracy (0.5%), Low-Noise (4.4 µVRMS), LDO Voltage Regulator 数据表 (Rev. B) PDF | HTML 2020-5-7
白皮书 揭秘 LDO 开通（启动）时间 PDF | HTML PDF | HTML 2026-4-27
白皮书 使用并联 LDO 降低系统噪声 PDF | HTML 英语版 PDF | HTML 2025-11-20
白皮书 Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 2022-12-14
白皮书 Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 2022-12-13
应用手册 Point-of-Load Solutions for Network Interface Cards (NIC) PDF | HTML 2021-9-8
技术文章 Minimize noise and ripple with a low-noise buck converter PDF | HTML 2020-10-21

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

TPS7A53EVM-031 — TPS7A53 3A、低输入电压、低噪声、高精度、超低压降 (LDO) 稳压器评估模块

TPS7A53 评估模块 (EVM) 专为典型配置而设计，用于评估 TPS7A53 器件的运行情况和性能，后者是一款高精度、3A、低 VIN、低 VOUT、低压降 (LDO) 稳压器。

该 EVM 电路板被配置为适用于动态负载电流需要高达 3A 的工程应用的参考设计。

用户指南: PDF | HTML
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仿真模型

TPS7A5201RPS PSpice Model (Rev. A)

SBVM952A.ZIP (3263 KB) - PSpice 模型
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仿真模型

TPS7A5301RPS PSpice Model

SBVM954.ZIP (19 KB) - PSpice 模型
支持的产品和硬件
计算工具

PARALLEL-LDO-CALC — Parallel low-dropout (LDO) calculator

并联低压降 (LDO) 计算器是一款基于 Microsoft® Excel® 的工具，它使用镇流电阻为并联 LDO 稳压器提供最坏情形分析。该工具可帮助用户确定所需的最低并联 LDO 稳压器数量，以及满足一组系统要求的合适镇流电阻。

计算器中预填充了并联应用中常用 LDO 稳压器的数据表信息。用户可以根据其系统要求来评估哪款 LDO 稳压器器件能够满足其系统需求。

支持的产品和硬件
参考设计

TIDA-010230 — 适用于雷达和 EW 应用的多通道射频收发器、低噪声时钟参考设计

在现代雷达和电子战 (EW) 系统中，有源电子扫描阵列 (AESA) 天线系统通常与高速多通道射频收发器一起使用。这些系统需要噪声极低的时钟，以便进行精确的通道间偏移调整，实现出色的系统性能，如信噪比 (SNR)、无杂散动态范围 (SFDR)、IMD3 和有效位数 (ENOB)。该参考设计展示了基于 LMX2820 和 LMK04832 且符合 JESD204B 标准的低噪声时钟，可让多个 AFE7950 在高达 X 带的频率范围内运行，并以小于 10ps 的时间实现器件同步，同时在 9GSPS、3GSPS DAC 或 ADC 时钟下提高系统性能。
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
VQFN-HR (RPS) 12 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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