DLPU094 July   2020 DLP5530S-Q1

 

  1.   1
  2.   2
    1.     3
    2.     4
    3.     5
    4.     6
      1.      7
    5.     8
      1.      9
      2.      10
        1.       11
        2.       12
        3.       13
      3.      14
    6.     15
    7.     16
      1.      17
        1.       18
        2.       19
      2.      20
      3.      21
        1.       22
          1.        23
          2.        24
          3.        25
          4.        26
        2.       27
          1.        28
          2.        29
            1.         30
            2.         31
            3.         32
            4.         33
            5.         34
    8.     35
  3.   36

1 Introduction

This document is a functional safety manual for the Texas Instruments DLP5530S-Q1 chipset. The chipset consists of three devices: DLP5530S-Q1 Digital Micromirror Device (DMD), the DLPC230S-Q1 controller for the DMD, and the TPS99000S-Q1 illumination controller. The specific orderable part numbers supported by this functional safety manual are as follows:

  • DLP5530SAFYSQ1
  • DLPC230STZDQQ1
  • DLPC230STZDQRQ1
  • TPS990STPZPQ1
  • TPS990STPZPRQ1

This functional safety manual provides information needed by system developers to help in the creation of a functional safety system using the DLP5530S-Q1 chipset. This document includes:

  • An overview of the chipset architecture
  • An overview of the development process used to decrease the probability of systematic failures
  • An overview of the functional safety architecture for management of random failures
  • The details of architecture partitions and recommended functional safety mechanisms

The following information is documented in the Functional Safety Analysis Report and is not repeated in this document:

  • Summary of failure rates (FIT) of the component
  • Summary of functional safety metrics of the hardware component for targeted standards (for example IEC 61508, ISO 26262, and so forth
  • Quantitative functional safety analysis (also known as FMEDA, Failure Modes, Effects, and Diagnostics Analysis) with detail of the different parts of the chipset, allowing for customized application of functional safety mechanisms. For the DLP5530S-Q1 chipset, TI will provide four total FMEDAs. One FMEDA for each component of the chipset, and one for the chipset.
  • Assumptions used in the calculation of functional safety metrics

The user of this document should have a general familiarity with the DLP5530S-Q1 chipset. For more information, refer to the chipset data sheets (DLPC230S-Q1, TPS99000S-Q1, DLP5530S-Q1) and the DLPC230-Q1 Programmer's Guide for Display Applications. This document is intended to be used in conjunction with the pertinent data sheets, technical reference manuals, and other component documentation.

For information that is beyond the scope of the listed deliverables, contact your TI sales representative or go to http://www.ti.com.