DLPU094 July   2020 DLP5530S-Q1

 

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7 DLP5530S-Q1 Management of Random Faults

For a functional safety critical development it is necessary to manage both systematic and random faults. The DLP5530S-Q1 chipset architecture includes many functional safety mechanisms, which can detect and respond to random faults when used correctly. This section of the document describes the architectural functional safety concept for the DLP5530S-Q1 chipset. The system integrator shall review the recommended functional safety mechanisms in the functional safety analysis report and the Failure Mode, Effects, and Diagnostics Analysis (FMEDA) in addition to this safety manual to determine the appropriate functional safety mechanisms to include in their system. The DLPC230S-Q1 Programmer's Guide for Display Applications is a useful document for finding more specific information about the implementation of these features.