ZHCSIQ7A august   2018  – december 2021 UCC28951

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Dissipation Ratings
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Start-Up Protection Logic
      2. 7.3.2  Voltage Reference (VREF)
      3. 7.3.3  Error Amplifier (EA+, EA–, COMP)
      4. 7.3.4  Soft-Start and Enable (SS/EN)
      5. 7.3.5  Light-Load Power Saving Features
      6. 7.3.6  Adaptive Delay, (Delay Between OUTA and OUTB, OUTC and OUTD (DELAB, DELCD, ADEL))
      7. 7.3.7  Adaptive Delay (Delay Between OUTA and OUTF, OUTB and OUTE (DELEF, ADELEF)
      8. 7.3.8  Minimum Pulse (TMIN)
      9. 7.3.9  Burst Mode
      10. 7.3.10 Switching Frequency Setting
      11. 7.3.11 Slope Compensation (RSUM)
      12. 7.3.12 Dynamic SR ON/OFF Control (DCM Mode)
      13. 7.3.13 Current Sensing (CS)
      14. 7.3.14 Cycle-by-Cycle Current Limit Current Protection and Hiccup Mode
      15. 7.3.15 Synchronization (SYNC)
      16. 7.3.16 Outputs (OUTA, OUTB, OUTC, OUTD, OUTE, OUTF)
      17. 7.3.17 Supply Voltage (VDD)
      18. 7.3.18 Ground (GND)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Power Loss Budget
        2. 8.2.2.2  Preliminary Transformer Calculations (T1)
        3. 8.2.2.3  QA, QB, QC, QD FET Selection
        4. 8.2.2.4  Selecting LS
        5. 8.2.2.5  Selecting Diodes DB and DC
        6. 8.2.2.6  Output Inductor Selection (LOUT)
        7. 8.2.2.7  Output Capacitance (COUT)
        8. 8.2.2.8  Select FETs QE and QF
        9. 8.2.2.9  Input Capacitance (CIN)
        10. 8.2.2.10 Current Sense Network (CT, RCS, R7, DA)
          1. 8.2.2.10.1 Voltage Loop Compensation Recommendation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
      1.      Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

GUID-20210908-SS0I-3RNM-NX3S-M2HZGMW5QLJF-low.svg Figure 5-1 PW Package, 24-Pin TSSOP (Top View)
Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
ADEL 14 I Dead-time programming for the primary switches over CS voltage range, tABSET and tCDSET.
ADELEF 13 I Delay-time programming between primary side and secondary side switches, tAFSET and tBESET.
COMP 4 I/O Error amplifier output and input to the PWM comparator.
CS 15 I Current sense for cycle-by-cycle overcurrent protection and adaptive delay functions.
DCM 12 I DCM threshold setting.
DELAB 6 I Dead-time delay programming between OUTA and OUTB.
DELCD 7 I Dead-time delay programming between OUTC and OUTD.
DELEF 8 I Delay-time programming between OUTA to OUTF, and OUTB to OUTE.
EA+ 2 I Error amplifier noninverting input.
EA– 3 I Error amplifier inverting input.
GND 24 — Ground. All signals are referenced to this node.
OUTA 22 O 0.2-A sink and source primary switching output.
OUTB 21 O
OUTC 20 O
OUTD 19 O
OUTE 18 O
OUTF 17 O
RSUM 11 I Slope compensation programming. Voltage mode or peak current mode setting.
RT 10 I Oscillator frequency set. leader or follower mode setting.
SS/EN 5 I Soft-start programming, device enable and hiccup mode protection circuit.
SYNC 16 I/O Synchronization out from leader controller to input of follower controller.
TMIN 9 I Minimum duty cycle programming in burst mode.
VDD 23 I Bias supply input.
VREF 1 O 5-V, ±1.5%, 20-mA reference voltage output.