SLUSFW8 March   2025 UCC27624V

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Supply Current
      2. 6.3.2 Input Stage
      3. 6.3.3 Enable Function
      4. 6.3.4 Output Stage
      5. 6.3.5 Low Propagation Delays and Tightly Matched Outputs
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VDD and Undervoltage Lockout
        2. 7.2.2.2 Drive Current and Power Dissipation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
  • DGN|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.6 Switching Characteristics

Unless otherwise noted, VDD = VEN = 12 V, TA = TJ = –40°C to 150°C, 1-µF capacitor from VDD to GND, no load on the output. Typical condition specifications are at 25°C (1).
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tRxRise timeCLOAD = 1.8 nF, 20% to 80%, Vin = 0 V – 3.3 V610ns
tFxFall timeCLOAD = 1.8 nF, 90% to 10%, Vin = 0 V – 3.3 V1014ns
tD1xTurn-on propagation delayCLOAD = 1.8 nF, VINx_H of the input rise to 10% of output rise, Vin = 0 V – 3.3 V, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C1727ns
tD2xTurn-off propagation delayCLOAD = 1.8 nF, VINx_L of the input fall to 90% of output fall, Vin = 0 V – 3.3 V, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C1727ns
tD3xEnable propagation delayCLOAD = 1.8 nF, VENx_H of the enable rise to 10% of output rise, Vin = 0 V – 3.3 V, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C1727ns
tD4xDisable propagation delayCLOAD = 1.8 nF, VENx_L of the enable fall to 90% of output fall, Vin = 0 V – 3.3 V, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C1727ns
tMDelay matching between two channelsCLOAD = 1.8 nF, Vin = 0 V – 3.3 V, Fsw = 500 kHz, 50% duty cycle, INA = INB, |tRA – tRB|, |tFA – tFB|12ns
tPWminMinimum input pulse widthCL = 1.8 nF, Vin = 0 V – 3.3 V, Fsw = 500 kHz, Vo > 1.5 V1015ns
(1) Switching parameters are not tested in production.