SLUSFW8 March   2025 UCC27624V

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Supply Current
      2. 6.3.2 Input Stage
      3. 6.3.3 Enable Function
      4. 6.3.4 Output Stage
      5. 6.3.5 Low Propagation Delays and Tightly Matched Outputs
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VDD and Undervoltage Lockout
        2. 7.2.2.2 Drive Current and Power Dissipation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
  • DGN|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

1 Features

  • Typical 5A peak source and sink drive current for each channel
  • Input and enable pins capable of handling –10V
  • Output capable of handling –2V transients
  • Absolute maximum VDD voltage: 30V
  • Wide VDD operating range from 9.5V to 26V with UVLO
  • Two independent gate drive channels
  • Independent enable function for each output
  • Hysteretic-logic thresholds for high noise immunity
  • VDD independent input thresholds (TTL compatible)
  • Fast propagation delays (17ns typical)
  • Fast rise and fall times (6ns and 10ns typical)
  • 1ns typical delay matching between the two channels
  • Two channels can be paralleled for higher drive current
  • SOIC8 and VSSOP8 PowerPAD™ package options
  • Operating junction temperature range of –40°C to 150°C