ZHCSBY9G July   2013  – June 2021 TPS54561

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Pulse Skip Eco-mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Soft Start/Tracking Pin (SS/TR)
      9. 7.3.9  Sequencing
      10. 7.3.10 Constant Switching Frequency and Timing Resistor (RT/CLK) Pin)
      11. 7.3.11 Maximum Switching Frequency
      12. 7.3.12 Synchronization to RT/CLK Pin
      13. 7.3.13 Accurate Current Limit Operation
      14. 7.3.14 Power Good (PWRGD Pin)
      15. 7.3.15 Overvoltage Protection
      16. 7.3.16 Thermal Shutdown
      17. 7.3.17 Small Signal Model for Loop Response
      18. 7.3.18 Simple Small Signal Model for Peak Current Mode Control
      19. 7.3.19 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Converter for 7-V to 60-V Input to 5-V at 5-A Output
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency
          3. 8.2.1.2.3  Output Inductor Selection (LO)
          4. 8.2.1.2.4  Output Capacitor
          5. 8.2.1.2.5  Catch Diode
          6. 8.2.1.2.6  Input Capacitor
          7. 8.2.1.2.7  Slow Start Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor Selection
          9. 8.2.1.2.9  Undervoltage Lockout Set Point
          10. 8.2.1.2.10 Output Voltage and Feedback Resistors Selection
          11. 8.2.1.2.11 Compensation
          12. 8.2.1.2.12 Power Dissipation Estimate
          13. 8.2.1.2.13 Safe Operating Area
          14. 8.2.1.2.14 Discontinuous Conduction Mode and Eco-mode Boundary
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Inverting Buck-Boost Topology for Positive Input to Negative Output
      3. 8.2.3 Split-Rail Topology for Positive Input to Negative and Positive Output
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Estimated Circuit Area
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design with WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

说明

TPS54561 是一款具有集成式高侧 MOSFET 的 60V、5A、降压稳压器。按照 ISO 7637 标准,此器件能够耐受的负载突降脉冲高达 65V。它采用电流模式控制,可实现简单的外部补偿和灵活的组件选择。一个低纹波脉冲跳跃模式将无负载时的电源电流减小至 152μA。当使能引脚被拉至低电平时,关断电源电流被减少至 2μA。

欠压闭锁在内部设定为 4.3V,但可用使能引脚上的一个外部电阻分压器将之提高。输出电压启动斜坡由软启动引脚控制,该引脚还可被配置用来控制时序/跟踪。开漏电源正常信号表示输出处于其标称电压的 93% 至 106% 之间。

宽可调开关频率范围可针对效率或者外部组件尺寸进行优化。逐周期电流限制、频率折返和热关断在过载条件下保护内部和外部组件。

TPS54561 采用 10 引脚 4mm × 4mm WSON 封装。

器件信息
器件型号 封装(1) 封装尺寸(标称值)
TPS54561 WSON (10) 4.00mm × 4.00mm
如需了解所有可用封装,请参阅数据表末尾的可订购产品附录。
GUID-6C7AAB4D-BFB6-486A-80C6-38C4199467E1-low.gif简化原理图
GUID-D0DB4F5C-70E2-4313-87DB-6ED184820829-low.png效率和负载电流间的关系