ZHCSTJ7A October   2023  – December 2023 TPS3762

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Specifications
    2. 6.2 Absolute Maximum Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Requirements
    7. 6.7 Timing Requirements
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristic
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Voltage (VDD)
        1. 7.3.1.1 Undervoltage Lockout (VPOR < VDD < UVLO)
        2. 7.3.1.2 Power-On Reset (VDD < VPOR )
      2. 7.3.2 SENSE
        1. 7.3.2.1 Reverse Polarity Protection
        2. 7.3.2.2 SENSE Hysteresis
      3. 7.3.3 Output Logic Configurations
        1. 7.3.3.1 Open-Drain
        2. 7.3.3.2 Active-Low (RESET)
        3. 7.3.3.3 Latching
      4. 7.3.4 User-Programmable Reset Time Delay
        1. 7.3.4.1 Reset Time Delay Configuration
      5. 7.3.5 User-Programmable Sense Delay
        1. 7.3.5.1 Sense Time Delay Configuration
      6. 7.3.6 Built-In Self-Test
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Adjustable Voltage Thresholds
    3. 8.3 Typical Application
      1. 8.3.1 Design 1: SELV Power Supply Monitoring
        1. 8.3.1.1 Design Requirements
        2. 8.3.1.2 Detailed Design Procedure
          1. 8.3.1.2.1 Setting Voltage Threshold
          2. 8.3.1.2.2 Meeting the Sense and Reset Delay
          3. 8.3.1.2.3 Setting Supply Voltage
          4. 8.3.1.2.4 Initiating Built-In Self-Test and Clearing Latch
        3. 8.3.1.3 Application Curves
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Power Dissipation and Device Operation
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.5.1 Sense Time Delay Configuration

The time delay (tCTS) can be programmed by connecting a capacitor between CTS pin and GND.

The relationship between external capacitor CCTS_EXT (typ) and the time delay tCTS (typ) is given by Equation 4.

Equation 4. tCTS (typ) = RCTS (typ) x CCTS_EXT (typ) + tCTS (no cap)

RCTS = is in kilo ohms (kΩ)

CCTS_EXT = is given in microfarads (μF)

tCTS = is the sense time delay (ms)

The sense delay varies according to three variables: the external capacitor (CCTS_EXT), CTS pin internal resistance (RCTS) provided in Electrical Characteristics, and a constant. The minimum and maximum variance due to the constant is show in Equation 5 and Equation 6:

Equation 5. tCTS (min) = RCTS (min) x CCTS_EXT (min) + tCTS (no cap (min))
Equation 6. tCTR (max) = RCTS (max) x CCTS_EXT (max) + tCTSx (no cap (max))

The recommended maximum sense delay capacitor for the TPS3762 is limited to 10 μF as this makes sure enough time for the capacitor to fully discharge when a voltage fault occurs. Also, having a too large of a capacitor value can cause very slow charge up (rise times) and system noise can cause the internal circuit to trip earlier or later near the threshold. This leads to variation in time delay where it can make the delay accuracy worse in the presence of system noise.

* Leakages on the capacitor can effect accuracy of sense time delay.