ZHCSUI2E May   2006  – January 2024 TPS28225

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Output Active Low
      3. 6.3.3 Enable/Power Good
      4. 6.3.4 3-State Input
        1. 6.3.4.1 TPS28225 3-State Exit Mode
        2. 6.3.4.2 External Resistor Interference
      5. 6.3.5 Bootstrap Diode
      6. 6.3.6 Upper and Lower Gate Drivers
      7. 6.3.7 Dead-Time Control
      8. 6.3.8 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Four Phases Driven by TPS28225 Driver
        2. 7.2.2.2 Switching The MOSFETs
        3. 7.2.2.3 List of Materials
      3. 7.2.3 Application Curves
    3. 7.3 System Examples
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 第三方产品免责声明
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 接收文档更新通知
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(3)
MIN MAX UNIT
Input supply voltage range, VDD(2) –0.3 8.8 V
Boot voltage, VBOOT –0.3 33 V
Phase voltage, VPHASE DC –2 32 or VBOOT + 0.3 – VDD whichever is less V
Pulse < 400 ns, E = 20 μJ –7 33.1 or VBOOT + 0.3 – VDD whichever is less V
Input voltage range, VPWM, VEN/PG –0.3 13.2 V
Output voltage range, VUGATE VPHASE – 0.3 VBOOT + 0.3, (VBOOT – VPHASE < 8.8) V
Pulse < 100 ns, E = 2 μJ VPHASE – 2 VBOOT + 0.3, (VBOOT – VPHASE < 8.8) V
Output voltage range, VLGATE –0.3 VDD + 0.3 V
Pulse < 100 ns, E = 2 μJ –2 VDD + 0.3 V
Continuous total power dissipation See Section 5.4
Operating virtual junction temperature range, TJ –40 150 °C
Lead temperature (soldering, 10 sec.) 300 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Data book for thermal limitations and considerations of packages.
(3) These devices are sensitive to electrostatic discharge; follow proper device handling procedures.