ZHCSI22E October   2017  – August 2019 TPS2662


  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
      2.      –60V 电源时的反向输入极性保护
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and In-Rush Current Control
      4. 9.3.4 Reverse Polarity Protection
        1. Input Side Reverse Polarity Protection
        2. Output Side Reverse Polarity Protection
      5. 9.3.5 Overload and Short Circuit Protection
        1. Overload Protection
        2. Short Circuit Protection
          1. Start-Up With Short-Circuit On Output
      6. 9.3.6 Reverse Current Protection
      7. 9.3.7 FAULT Response
      8. 9.3.8 IN, OUT, RTN, and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Low Current Shutdown Control (SHDN)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. Step by Step Design Procedure
        2. Programming the Current-Limit Threshold R(ILIM) Selection
        3. Undervoltage Lockout and Overvoltage Set Point
        4. Setting Output Voltage Ramp Time—(tdVdT)
          1. Case 1: Start-Up Without Load—Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. Case 2: Start-Up With Load —Output Capacitance C(OUT) and Load Draws Current During Start-Up
          3. Support Component Selections - RFLT and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Field Supply Protection in PLC, DCS I/O Modules
      2. 10.3.2 Simple 24-V Power Supply Path Protection
      3. 10.3.3 Power Stealing in Smart Thermostat
    4. 10.4 Do's and Don'ts
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 接收文档更新通知
    2. 13.2 社区资源
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 Glossary
  14. 14机械、封装和可订购信息


机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)

Transient Protection

In case of short circuit and over load current limit, when the device interrupts current flow, input inductance generates a positive voltage spike on the input and output inductance generates a negative voltage spike on the output. The peak amplitude of voltage spikes (transients) depends on the value of inductance in series to the input or output of the device. These transients can exceed the Absolute Maximum Ratings of the device if steps are not taken to address the issue.

Typical methods for addressing transients include:

  • Minimizing lead length and inductance into and out of the device
  • Using large PCB GND plane
  • Use of a Schottky diode across the output and GND to absorb negative spikes in the designs with TPS26620, TPS26621, TPS26622, TPS26623 devices and a TVS clamp in the designs withTPS26624 and TPS26625 devices
  • A low value ceramic capacitor (C(IN) to approximately 0.1 μF) to absorb the energy and dampen the transients.

The approximate value of input capacitance can be estimated with Equation 13.

Equation 13. TPS2662 equ_08_SLVSDG2.gif


  • V(IN) is the nominal supply voltage
  • I(LOAD) is the load current
  • L(IN) equals the effective inductance seen looking into the source
  • C(IN) is the capacitance present at the input

Some applications may require additional Transient Voltage Suppressor (TVS) to prevent transients from exceeding the Absolute Maximum Ratings of the device. These transients can occur during positive and negative surge tests on the supply lines. In such applications it is recommended to place at least 1 µF of input capacitor to limit the falling slew rate of the input voltage within a maximum of 20 V/µs.

The circuit implementation with optional protection components (a ceramic capacitor, TVS and schottky diode) is shown in Figure 61 and Figure 62.

TPS2662 circuit_imp_pro_comp_SLVSDT4.gif
* Optional components needed for suppression of transients
Figure 61. Circuit Implementation With Optional Protection Components for TPS26620, TPS26621, TPS26622 and TPS26623
TPS2662 circuit_imp_pro_comp_SLVSDT4_4_5.gif
* Optional components needed for suppression of transients
Figure 62. Circuit Implementation With Optional Protection Components for TPS26624 and TPS26625