ZHCSI18A April   2018  – July 2018 OPA858


  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      高速飞行时间接收器
      2.      光电二极管电容与带宽和噪声
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input and ESD Protection
      2. 9.3.2 Feedback Pin
      3. 9.3.3 Wide Gain-Bandwidth Product
      4. 9.3.4 Slew Rate and Output Stage
      5. 9.3.5 Current Noise
    4. 9.4 Device Functional Modes
      1. 9.4.1 Split-Supply and Single-Supply Operation
      2. 9.4.2 Power-Down Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Using the OPA858 as a Transimpedance Amplifier
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 接收文档更新通知
    2. 13.2 社区资源
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 术语表
  14. 14机械、封装和可订购信息


机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)

Layout Example

OPA858 OPA858_Layout.gifFigure 64. Layout Recommendation

When configuring the OPA858 as a transimpedance amplifier additional care must be taken to minimize the inductance between the avalanche photodiode (APD) and the amplifier. Always place the photodiode on the same side of the PCB as the amplifier. Placing the amplifier and the APD on opposite sides of the PCB increases the parasitic effects due to via inductance. APD packaging can be quite large which often requires the APD to be placed further away from the amplifier than ideal. The added distance between the two device results in increased inductance between the APD and op amp feedback network as shown in Figure 65. The added inductance is detrimental to a decompensated amplifiers stability since it isolates the APD capacitance from the noise gain transfer function. The noise gain is given by Equation 4. The added PCB trace inductance between the feedback network increases the denominator in Equation 4 thereby reducing the noise gain and the phase margin. In cases where a leaded APD in a TO can is used inductance should be further minimized by cutting the leads of the TO can as short as possible.

The layout shown in Figure 65 can be improved by following some of the guidelines shown in Figure 66. The two key rules to follow are:

  • Add an isolation resistor RISO as close as possible to the inverting input of the amplifier. Select the value of RISO to be between 10 Ω and 20 Ω. The resistor dampens the potential resonance caused by the trace inductance and the amplifiers internal capacitance.
  • Close the loop between the feedback elements (RF and CF) and RISO as close to the APD pins as possible. This ensures a more balanced layout and reduces the inductive isolation between the APD and the feedback network.

Equation 4. OPA858 Eq_NG_Layout.gif


  • ZF is the total impedance of the feedback network.
  • ZIN is the total impedance of the input network.
OPA858 TIALayout_OPA85x.gifFigure 65. Non-Ideal TIA Layout
OPA858 LayoutTrick_OPA85x.gifFigure 66. Improved TIA Layout