SLLSFT3 November 2025 MC121-Q1
ADVANCE INFORMATION
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWER SUPPLIES (VM) | ||||||
| IVMQ | VM sleep mode current | VPWM/DC = 0V, SLEEP_EN = 0x1 | 0.08 | 0.14 | mA | |
| IVM | VM active mode current | VPWM/DC = 3V (PWMDC_MODE = 0x1) or floating (PWM_DC = 0x0), no load across OUTx | 3.9 | 5 | mA | |
| tWAKE | Turn-on time from standby/sleep mode | Time taken from PWM duty = 0% to 100% to OUTx switching, PWM input (PWMDC_MODE = 0x0), PWM_IN_RANGE = 0x0 | 16 | ms | ||
| Time taken from PWM duty = 0% to 100% to OUTx switching, PWM input (PWMDC_MODE = 0x0), PWM_IN_RANGE = 0x1 | 64 | ms | ||||
| Turn-on time from standby/sleep mode | Time taken from DC input = 0V to 3V to OUTx switching, DC input (PWMDC_MODE = 0x1) | 1 | ms | |||
| tSTOP_DET | Time taken to detect DIN = 0% | Time take from PWM duty = 100% to 0% to initiate motor stop as per RAMP_ON_STOP_DIS, PWM input (PWMDC_MODE = 0x0, PWM_IN_RANGE = 0x0) | 16 | ms | ||
| Time take from PWM duty = 100% to 0% to initiate motor stop as per RAMP_ON_STOP_DIS, PWM input (PWMDC_MODE = 0x0, PWM_IN_RANGE = 0x1) | 64 | ms | ||||
| Time taken to detect DIN = 0% | Time take from DC input = 3V to 0V to initiate motor stop as per RAMP_ON_STOP_DIS, DC input (PWMDC_MODE =0x1) | 1.3 | ms | |||
| PWM/DC (SCL) and FG (SDA) | ||||||
| VIL | Input logic low voltage | PWM/DC pin in PWM input mode (PWMDC_MODE =0x0) during active or standby state or SCL mode, FG pin in SDA mode | 0.8 | V | ||
| VIH | Input logic high voltage | 2 | V | |||
| VHYS | Input hysteresis | 0.15 | 0.2 | 0.26 | V | |
| VSLEEP_DC | Voltage threshold on PWM/DC pin for sleep entry in DC input mode | Voltage applied on PWM/DC pin, SLEEP_EN = 0x1, PWMDC_MODE = 0x1 | 0 | 0.1 | V | |
| IIL (PWM/DC) | Input logic low current | VI = 0V, SLEEP_EN = 0x0, PWM/DC pin in PWM input mode (PWMDC_MODE = 0x0) or SCL mode | 225 | 245 | 265 | µA |
| VI = 0V, SLEEP_EN = 0x0, PWM/DC pin in DC input mode (PWMDC_MODE = 0x1) | 1 | µA | ||||
| VI = 0V, SLEEP_EN = 0x1, PWM/DC pin in PWM input mode (PWMDC_MODE = 0x0) or DC input mode (PWMDC_MODE = 0x1) or SCL mode | 20 | 50 | 70 | µA | ||
| IIH (PWM/DC) | Input logic high current | VI = 3.3V, PWM/DC pin in PWM input mode (PWMDC_MODE = 0x0) or DC input mode (PWMDC_MODE = 0x1) or SCL mode | -1 | 0 | µA | |
| VI = VVM, PWM/DC pin in PWM input mode (PWMDC_MODE = 0x0) or DC input mode (PWMDC_MODE = 0x1) or SCL mode | -1 | 0 | µA | |||
| VPU (PWM/DC) | Internal pull-up voltage | PWM input mode (PWMDC_MODE = 0x0), VM ≥ 3.6V | 2.7 | 2.9 | 3.2 | V |
| PWM input mode (PWMDC_MODE = 0x0), VM < 3.6V | 2.55 | VM | V | |||
| fPWM_IN | Input PWM frequency range for duty/speed reference | PWM input (PWMDC_MODE = 0x0), PWM_IN_RANGE = 0x0 | 0.08 | 90 | kHz | |
| PWM input (PWMDC_MODE = 0x0), PWM_IN_RANGE = 0x1 | 0.02 | 22 | kHz | |||
| VPWM_ACC | Duty/speed reference accuracy from PWM input | 20Hz ≤ fPWM_IN ≤ 45kHz | 0.4 | % | ||
| 45kHz < fPWM_IN ≤ 90kHz | 0.8 | % | ||||
| VDC | DC input range for duty/speed reference | DC input (PWMDC_MODE = 0x1), 3.2V ≤ VM < 4.5V | 0 | VM - 1.4 | V | |
| DC input (PWMDC_MODE = 0x1), 4.5V ≤ VM ≤ 35V | 0 | 3.1 | V | |||
| VDC_DIN_0% | DC input threshold for 0% duty/speed reference (DIN = 0%) | DC input (PWMDC_MODE = 0x1) | 0.1 | V | ||
| VDC_DIN_100% | DC input threshold for 100% duty/speed reference (DIN = 100%) | DC input (PWMDC_MODE = 0x1), 3.2V ≤ VM < 4.5V | VM - 1.4 | 3.2 | V | |
| DC input (PWMDC_MODE = 0x1), 4.5V ≤ VM ≤ 35V | 2.9 | 3 | 3.2 | V | ||
| VDC_ACC | Duty/speed reference accuracy from DC input | DC input (PWMDC_MODE = 0x1), 4.5V ≤ VM ≤ 35V | 3 | % | ||
| VOL (FG) | Output logic low voltage | IOD = 20mA | 0.4 | V | ||
| IOZ (FG) | Output logic high current | VOD = 3.3V | -1 | 1 | µA | |
| IOZ (FG) | Output logic high current | VOD = VM | -1 | 1 | µA | |
| DRIVER OUTPUTS (OUTx) | ||||||
| RDS(on) (H+L) | High-side+Low-side MOSFET on resistance | VVM = 3.2V, IO = 500mA, TA = 25°C | 0.85 | 1.02 | Ω | |
| RDS(on) (H+L) | High-side+Low-side MOSFET on resistance | VVM = 12V, IO = 500mA, TA = 25°C | 0.8 | 0.95 | Ω | |
| RDS(on) (H+L) | High-side+Low-side MOSFET on resistance | VVM = 12V, IO = 500mA, TA = 150°C | 1.3 | 1.5 | Ω | |
| fPWM_OUT | PWM output frequency | PWM_OUT_FREQ = 0x0, DITHER_EN = 0x0 | 23.5 | 25 | 26.25 | kHz |
| fPWM_OUT | PWM output frequency | PWM_OUT_FREQ = 0x1, DITHER_EN = 0x0 | 45 | 50 | 55 | kHz |
| DIGITAL-LATCH HALL EFFECT SENSOR | ||||||
| BOP | Operate point | 0.4 | 0.8 | 1.6 | mT | |
| BRP | Release point | -1.6 | -0.7 | -0.4 | mT | |
| BHYS | Hysteresis; BHYS = (BOP – BRP) | 1.2 | 1.6 | 3.2 | mT | |
| BOF | Magnetic offset; BOF = (BOP + BRP) / 2 | -1 | 0 | 1 | mT | |
| OSCILLATOR | ||||||
| fosc | Internal oscillator frequency | VVM = 12V, TJ = 25oC | 24.625 | 25 | 25.375 | MHz |
| fosc | Internal oscillator frequency | 24.25 | 25 | 25.75 | MHz | |
| DUTY CURVE | ||||||
| DOUT_RES | Output duty cycle resolution per LSB | Measured at 50% voltage level, 0.4% ≤ DOUT ≤ 99.6% | 0.4 | % | ||
| DHYS | Speed curve hysteresis for rising DIN | DIN_HYS = 0x0. Sweep DIN from 0% to DIN0+DIN_HYS. Output DOUT changes from DOUT0 to target duty cycle. | 0 | % | ||
| DIN_HYS = 0x1. Sweep DIN from 0% to DIN0+DIN_HYS. Output DOUT changes from DOUT0 to target duty cycle. | 1.2 | % | ||||
| DIN_HYS = 0x2. Sweep DIN from 0% to DIN0+DIN_HYS. Output DOUT changes from DOUT0 to target duty cycle. | 2.4 | % | ||||
| DIN_HYS = 0x3. Sweep DIN from 0% to DIN0+DIN_HYS. Output DOUT changes from DOUT0 to target duty cycle. | 4.8 | % | ||||
| SPEEDERR | Closed loop speed accuracy | TJ = 25oC, SPEED_LOOP_EN = 0x1, 12.5% x MAX_SPEED ≤ SPEED_REF ≤ MAX_SPEED | -1 | 1 | % | |
| SPEED_LOOP_EN = 0x1, 12.5% x MAX_SPEED ≤ SPEED_REF ≤ MAX_SPEED | -3 | 3 | % | |||
| COMMUTATION | ||||||
| θHALL_OS_ANGLE | Minimum Hall offset angle | HALL_OS_ANGLE = 0x00 | 0 | deg | ||
| Maximum Hall offset angle | HALL_OS_ANGLE = 0x1F | 43.8 | deg | |||
| θHALL_OS_ANGLE_LSB | Hall offset angle resolution per LSB | HALL_OS_ANGLE LSB | 1.4 | deg | ||
| tHALL_OS | Minimum Hall offset signal lead/lag time | HALL_OS_TIME = 0x00 | 0 | µs | ||
| Maximum Hall offset signal lead/lag time | HALL_OS_TIME = 0xFF | 2.55 | ms | |||
| tHALL_OS_LSB | Hall offset signal lead/lag time resolution per LSB | HALL_OS_TIME LSB | 10 | µs | ||
| tDEMAG | Minimum time for demagnetization period | DEMAG_TIME = 0x00 | 0 | µs | ||
| Maximum time for demagnetization period | DEMAG_TIME = 0x20 | 1.29 | ms | |||
| tDEMAG_LSB | DEMAG_TIME time resolution per LSB | DEMAG_TIME LSB | 10.24 | µs | ||
| θSRISE | Minimum angle for soft rise | SRISE = 0x00 | 2.8 | deg | ||
| Maximum angle for soft rise | SRISE = 0x10 | 90 | deg | |||
| θSRISE_LSB | SRISE angle resolution per LSB | SRISE LSB | 2.8 | deg | ||
| θSFALL | Minimum angle for soft fall | SFALL = 0x00 | 2.8 | deg | ||
| Maximum angle for soft fall | SFALL = 0x1F | 90 | deg | |||
| θSFALL_LSB | SFALL angle resolution per LSB | SRISE LSB | 2.8 | deg | ||
| PRESTART AND PWM RAMP/SOFT START | ||||||
| PWM_RAMP_RATE | Output duty cycle ramp rate for soft start and speed changes | PWM_RAMP_SEL = 0x0 (1.3s for 0 to 100%) | 77 | %/s | ||
| PWM_RAMP_SEL = 0x1 (2.6s for 0 to 100%) | 38.5 | %/s | ||||
| PWM_RAMP_SEL = 0x2 (5.2s for 0 to 100%) | 19.2 | %/s | ||||
| PWM_RAMP_SEL = 0x3 (10.4s for 0 to 100%) | 9.6 | %/s | ||||
| PROTECTION CIRCUITS | ||||||
| VMCLAMP | VM clamping voltage | Iclamp = 20mA | 37 | 43 | V | |
| VMPOR | VM power on reset threshold to power-up the device | Supply rising | 2.3 | 2.55 | 2.7 | V |
| VMPOR_HYS | VM power on reset threshold hysteresis | Rising to falling threshold | 0.04 | 0.09 | 0.13 | V |
| VUVLO | Supply undervoltage lockout threshold to start/stop driving the motor | Supply rising (UVLO_SEL = 0x0) | 2.85 | 3 | 3.15 | V |
| Supply falling (UVLO_SEL = 0x0) | 2.55 | 2.7 | 2.85 | V | ||
| VUVLO_HYS | Supply UVLO hysteresis | Rising to falling threshold (UVLO_SEL = 0x0) | 0.3 | V | ||
| VUVLO | Supply undervoltage lockout threshold to start/stop driving the motor | Supply rising (UVLO_SEL = 0x1) | 3.97 | 4.2 | 4.5 | V |
| Supply falling (UVLO_SEL = 0x1) | 2.55 | 2.7 | 2.85 | V | ||
| VUVLO_HYS | Supply UVLO hysteresis | Rising to falling threshold (UVLO_SEL = 0x1) | 1.5 | V | ||
| VUVLO | Supply undervoltage lockout threshold to start/stop driving the motor | Supply rising (UVLO_SEL = 0x2) | 5.42 | 5.7 | 6 | V |
| Supply falling (UVLO_SEL = 0x2) | 2.55 | 2.7 | 2.85 | V | ||
| VUVLO_HYS | Supply UVLO hysteresis | Rising to falling threshold (UVLO_SEL = 0x2) | 3 | V | ||
| VUVLO | Supply undervoltage lockout threshold to start/stop driving the motor | Supply rising (UVLO_SEL = 0x3) | 7.2 | 7.6 | 8 | V |
| Supply falling (UVLO_SEL = 0x3) | 2.55 | 2.7 | 2.85 | V | ||
| VUVLO_HYS | Supply UVLO hysteresis | Rising to falling threshold (UVLO_SEL = 0x3) | 4.9 | V | ||
| VOVP | Supply overvoltage lockout (OVP) | Supply rising (OVP_SEL = 0x0) | 32.7 | 34.5 | 36.3 | V |
| VOVP | Supply overvoltage lockout (OVP) | Supply falling (OVP_SEL = 0x0) | 31.4 | 33.2 | 34.9 | V |
| VOVP | Supply overvoltage lockout (OVP) | Supply rising (OVP_SEL = 0x1) | 21.5 | 22.7 | 23.9 | V |
| VOVP | Supply overvoltage lockout (OVP) | Supply falling (OVP_SEL = 0x1) | 20.1 | 21.2 | 22.3 | V |
| VOVP | Supply overvoltage lockout (OVP) | Supply rising (OVP_SEL = 0x2) | 17.5 | 18.4 | 19.3 | V |
| VOVP | Supply overvoltage lockout (OVP) | Supply falling (OVP_SEL = 0x2) | 15.9 | 16.9 | 17.9 | V |
| VOVP_HYS | Supply overvoltage hysteresis | 1.5 | V | |||
| tOVP_DEG | Supply overvoltage deglitch time | 70 | 80 | 90 | µs | |
| tOVP_BLANK | Supply overvoltage blanking time | OVP_BLANK_EN = 0x1, OVP_BLANK_TIME = 0x0 | 1 | ms | ||
| OVP_BLANK_EN = 0x1, OVP_BLANK_TIME = 0x1 | 4 | ms | ||||
| ILIMIT | Current limit threshold | ILIMIT_SEL = 0x0 | 0.29 | 0.32 | 0.37 | A |
| ILIMIT_SEL = 0x1 | 0.38 | 0.43 | 0.49 | A | ||
| ILIMIT_SEL = 0x2 | 0.48 | 0.53 | 0.61 | A | ||
| ILIMIT_SEL = 0x3 | 0.58 | 0.63 | 0.73 | A | ||
| ILIMIT_SEL = 0x4 | 0.67 | 0.73 | 0.85 | A | ||
| ILIMIT_SEL = 0x5 | 0.76 | 0.83 | 0.97 | A | ||
| ILIMIT_SEL = 0x6 | 0.85 | 0.94 | 1.09 | A | ||
| ILIMIT_SEL = 0x7 | 0.94 | 1.03 | 1.21 | A | ||
| ILIMIT_SEL = 0x8 | 1.03 | 1.12 | 1.33 | A | ||
| ILIMIT_SEL = 0x9 | 1.11 | 1.21 | 1.44 | A | ||
| tILIMIT_BLANK | Current limit blanking time (applied from most recent rising edge PWM (FET) signal) | ILIM_BLANK_SEL = 0x0 | 0.5 | µs | ||
| ILIM_BLANK_SEL = 0x1 | 1 | µs | ||||
| tILIMIT_DEG | Current limit deglitch time | ILIM_DEGLITCH_SEL = 0x0 | 0.6 | µs | ||
| Current limit deglitch time | ILIM_DEGLITCH_SEL = 0x1 | 1.1 | µs | |||
| IOCP | Overcurrent protection trip point (HS_FET) | 1.3 * ILIMIT | 1.7 * ILIMIT | 2.2 * ILIMIT | A | |
| IOCP | Overcurrent protection trip point (LS_FET) | 1.5 * ILIMIT | 1.7 * ILIMIT | 1.85 * ILIMIT | A | |
| tOCP_DEG | Overcurrent protection deglitch time | 0.6 | µs | |||
| tLRD_START | Locked rotor detection time at start-up | LRD_TIME_STARTUP = 0x0 | 0.31 | 0.32 | 0.34 | s |
| LRD_TIME_STARTUP = 0x1 | 0.42 | 0.44 | 0.46 | s | ||
| LRD_TIME_STARTUP = 0x2 | 0.5 | 0.52 | 0.55 | s | ||
| LRD_TIME_STARTUP = 0x3 | 1 | 1.05 | 1.1 | s | ||
| NRETRY | Long retry time ratio for locked rotor and overcurrent. Long retry time = NRETRY x tLRD_START | LRD_LONG_RETRY_SEL = 0x0 | 2 | |||
| LRD_LONG_RETRY_SEL = 0x1 | 4 | |||||
| LRD_LONG_RETRY_SEL = 0x2 | 8 | |||||
| LRD_LONG_RETRY_SEL = 0x3 | 10 | |||||
| LRD_LONG_RETRY_SEL = 0x4 | 12 | |||||
| LRD_LONG_RETRY_SEL = 0x5 | 16 | |||||
| LRD_LONG_RETRY_SEL = 0x6 | 24 | |||||
| LRD_LONG_RETRY_SEL = 0x7 | 28 | |||||
| tLRD_RUN | Locked rotor detection time at start-up | Locked rotor during motor run | 0.29 | 0.32 | 0.35 | s |
| TTSD | Thermal shutdown temperature | 155 | 170 | 185 | °C | |
| THYS | Thermal shutdown hysteresis | 24 | °C | |||