SLLSFT3 November   2025 MC121-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Auto
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Timing Requirements
    7. 5.7 Timing Diagrams
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Motor Control
        1. 6.3.1.1 Duty Input
        2. 6.3.1.2 Duty Curve
        3. 6.3.1.3 Motor Start, Speed Change, and Stop
        4. 6.3.1.4 Open-Loop (Duty Cycle) Control
        5. 6.3.1.5 Closed-Loop (Speed) Control
        6. 6.3.1.6 Commutation
          1. 6.3.1.6.1 Hall Sensor
            1. 6.3.1.6.1.1 Field Direction Definition
            2. 6.3.1.6.1.2 Internal Hall Latch Sensor Output
          2. 6.3.1.6.2 Hall Offset
          3. 6.3.1.6.3 Square Commutation
          4. 6.3.1.6.4 Soft Commutation
        7. 6.3.1.7 PWM Modulation Modes
      2. 6.3.2 Protections
        1. 6.3.2.1 Locked Rotor Protection
        2. 6.3.2.2 Current Limit
        3. 6.3.2.3 Overcurrent Protection (OCP)
        4. 6.3.2.4 VM Undervoltage Lockout (UVLO)
        5. 6.3.2.5 VM Over Voltage Protection (OVP)
        6. 6.3.2.6 Thermal Shutdown (TSD)
        7. 6.3.2.7 Integrated Supply (VM) Clamp
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Sleep and Standby Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Test Mode and One-Time Programmable Memory
    5. 6.5 Programming
      1. 6.5.1 I2C Communication
        1. 6.5.1.1 I2C Read
        2. 6.5.1.2 I2C Write
  8. Register Map
    1. 7.1 USR_OTP Registers
    2. 7.2 USR_TM Registers
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Components
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Bulk Capacitance
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History

封装选项

机械数据 (封装 | 引脚)
  • DYM|6
  • DEZ|6
散热焊盘机械数据 (封装 | 引脚)
订购信息

Locked Rotor Protection

When the MC121-Q1 does not detect a Hall transition for longer than the locked rotor detection time (tLRD), a locked rotor fault is recognized, all FETs are disabled (Hi-Z) and the FG/RD pin indicates the locked rotor fault according to Table 6-4. tLRD is set by tLRD_START during start-up sequence, while tLRD is set by tLRD_RUN during motor run (steady state). The locked rotor retry sequence (when LRD_RETRY_DIS = 0x0) during start-up is as shown in Figure 6-22. During the first start-up after power-up/wake-up, the number of quick retry attempts is set by LRD_NRETRY_STARTUP; the quick retry time is same as the locked rotor detection time (tLRD_START). If the locked rotor condition persists after LRD_NRETRY_START attempts are completed, MC121-Q1 enters a long retry time (tlock_long_retry) which is (LRD_LONG_RETRY_SEL x tLRD_START). Once the long retry time lapses, MC121-Q1 attempts to spin the motor again; on the second start-up attempt after power-up/wake-up, the number of quick retry attempts is set by LRD_NRETRY_RUN while the locked rotor detection time (tLRD_START) and quick retry time remain the same. If the locked rotor condition persists after LRD_NRETRY_RUN attempts are completed, MC121-Q1 enters a long retry time (tlock_long_retry) again. Subsequent motor start-up sequences uses the same retry pattern as the second start-up cycle as shown in Figure 6-22. Every motor start-up attempt after retry time lapse (quick or long retry) is initiated from the pre-start phase as shown in Figure 6-6.

MC121-Q1 Locked rotor retry sequence and timing
          during start-up when LRD_RETRY_DIS = 0x0 Figure 6-22 Locked rotor retry sequence and timing during start-up when LRD_RETRY_DIS = 0x0

When a locked rotor condition is detected during motor run (no Hall transition for tLRD_RUN), all FETs are in disabled (Hi-Z) and the FG/RD pin indicates the locked rotor fault according to Table 6-4. MC121-Q1 waits for one interval of long retry time before starting the locked rotor retry sequence as shown in Figure 6-23.

MC121-Q1 Locked rotor retry sequence and timing
          during run when LRD_RETRY_DIS = 0x0 Figure 6-23 Locked rotor retry sequence and timing during run when LRD_RETRY_DIS = 0x0

MC121-Q1 provides the option of latching a locked rotor fault after 5 consecutive start attempts result in a locked rotor by setting LRD_RETRY_DIS = 0x1 as shown in Figure 6-24. Motor operation can resumed either by a power reset or wake-up (sleep exit).

MC121-Q1 Locked rotor retry sequence and timing
          when LRD_RETRY_DIS = 0x1 Figure 6-24 Locked rotor retry sequence and timing when LRD_RETRY_DIS = 0x1