ZHCSGW5A January   2017  – August 2017 CC2640R2F-Q1

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 功能框图
  2. 2修订历史记录
  3. 3 Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram - RGZ Package
    2. 4.2 Signal Descriptions - RGZ Package
    3. 4.3 Wettable Flanks
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Power Consumption Summary
    5. 5.5  General Characteristics
    6. 5.6  1-Mbps GFSK (Bluetooth low energy Technology) - RX
    7. 5.7  1-Mbps GFSK (Bluetooth low energy Technology) - TX
    8. 5.8  24-MHz Crystal Oscillator (XOSC_HF)
    9. 5.9  32.768-kHz Crystal Oscillator (XOSC_LF)
    10. 5.10 48-MHz RC Oscillator (RCOSC_HF)
    11. 5.11 32-kHz RC Oscillator (RCOSC_LF)
    12. 5.12 ADC Characteristics
    13. 5.13 Temperature Sensor
    14. 5.14 Battery Monitor
    15. 5.15 Continuous Time Comparator
    16. 5.16 Low-Power Clocked Comparator
    17. 5.17 Programmable Current Source
    18. 5.18 Synchronous Serial Interface (SSI)
    19. 5.19 DC Characteristics
    20. 5.20 Thermal Resistance Characteristics for RGZ Package
    21. 5.21 Timing Requirements
    22. 5.22 Switching Characteristics
    23. 5.23 Typical Characteristics
  6. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Main CPU
    4. 6.4  RF Core
    5. 6.5  Sensor Controller
    6. 6.6  Memory
    7. 6.7  Debug
    8. 6.8  Power Management
    9. 6.9  Clock Systems
    10. 6.10 General Peripherals and Modules
    11. 6.11 System Architecture
  7. 7Application, Implementation, and Layout
    1. 7.1 Application Information
    2. 7.2 7 × 7 Internal Differential (7ID) Application Circuit
      1. 7.2.1 Layout
  8. 8器件和文档支持
    1. 8.1  器件命名规则
    2. 8.2  工具和软件
    3. 8.3  文档支持
    4. 8.4  德州仪器 (TI) 低功耗射频网站
    5. 8.5  社区资源
    6. 8.6  其他信息
    7. 8.7  商标
    8. 8.8  静电放电警告
    9. 8.9  出口管制提示
    10. 8.10 术语表
  9. 9机械、封装和可订购信息
    1. 9.1 封装信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RGZ|48
散热焊盘机械数据 (封装 | 引脚)
订购信息

Terminal Configuration and Functions

Pin Diagram – RGZ Package

CC2640R2F-Q1 PO_CC26xx_QFN32_7x7.gif

NOTE:

The following I/O pins marked in bold have high-drive capabilities:
  • Pin 10: DIO_5
  • Pin 11: DIO_6
  • Pin 12: DIO_7
  • Pin 24: JTAG_TMSC
  • Pin 26: DIO_16
  • Pin 27: DIO_17

NOTE:

The following I/O pins marked in italics have analog capabilities:
  • Pin 36: DIO_23
  • Pin 37: DIO_24
  • Pin 38: DIO_25
  • Pin 39: DIO_26
  • Pin 40: DIO_27
  • Pin 41: DIO_28
  • Pin 42: DIO_29
  • Pin 43: DIO_30
Figure 4-1 48-Pin RGZ Package with Wettable Flanks
7-mm × 7-mm Pinout, 0.5-mm Pitch
Top View

Signal Descriptions – RGZ Package

Table 4-1 Signal Descriptions – RGZ Package

NAME NO. TYPE DESCRIPTION
DCDC_SW 33 Power Output from internal DC/DC(1)
DCOUPL 23 Power 1.27-V regulated digital-supply decoupling capacitor(2)
DIO_0 5 Digital I/O GPIO, Sensor Controller
DIO_1 6 Digital I/O GPIO, Sensor Controller
DIO_2 7 Digital I/O GPIO, Sensor Controller
DIO_3 8 Digital I/O GPIO, Sensor Controller
DIO_4 9 Digital I/O GPIO, Sensor Controller
DIO_5 10 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_6 11 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_7 12 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_8 14 Digital I/O GPIO
DIO_9 15 Digital I/O GPIO
DIO_10 16 Digital I/O GPIO
DIO_11 17 Digital I/O GPIO
DIO_12 18 Digital I/O GPIO
DIO_13 19 Digital I/O GPIO
DIO_14 20 Digital I/O GPIO
DIO_15 21 Digital I/O GPIO
DIO_16 26 Digital I/O GPIO, JTAG_TDO, high-drive capability
DIO_17 27 Digital I/O GPIO, JTAG_TDI, high-drive capability
DIO_18 28 Digital I/O GPIO
DIO_19 29 Digital I/O GPIO
DIO_20 30 Digital I/O GPIO
DIO_21 31 Digital I/O GPIO
DIO_22 32 Digital I/O GPIO
DIO_23 36 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_24 37 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_25 38 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_26 39 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_27 40 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_28 41 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_29 42 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_30 43 Digital/Analog I/O GPIO, Sensor Controller, Analog
JTAG_TMSC 24 Digital I/O JTAG TMSC, high-drive capability
JTAG_TCKC 25 Digital I/O JTAG TCKC
RESET_N 35 Digital input Reset, active-low. No internal pullup.
RF_P 1 RF I/O Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RF_N 2 RF I/O Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
VDDR 45 Power Connect to output of internal DC/DC(2)(3)
VDDR_RF 48 Power Connect to output of internal DC/DC(2)(4)
VDDS 44 Power 1.8-V to 3.8-V main chip supply(1)
VDDS2 13 Power 1.8-V to 3.8-V DIO supply(1)
VDDS3 22 Power 1.8-V to 3.8-V DIO supply(1)
VDDS_DCDC 34 Power 1.8-V to 3.8-V DC/DC supply
X32K_Q1 3 Analog I/O 32-kHz crystal oscillator pin 1
X32K_Q2 4 Analog I/O 32-kHz crystal oscillator pin 2
X24M_N 46 Analog I/O 24-MHz crystal oscillator pin 1
X24M_P 47 Analog I/O 24-MHz crystal oscillator pin 2
EGP Power Ground – Exposed Ground Pad
See the technical reference manual listed in Section 8.3 for more details.
Do not supply external circuitry from this pin.
If internal DC/DC is not used, this pin is supplied internally from the main LDO.
If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.

Wettable Flanks

The automotive industry requires original equipment manufacturers (OEMs) to perform 100% automated visual inspection (AVI) post-assembly to ensure that cars meet the current demands for safety and high reliability. Standard quad-flat no-lead (VQFN) packages do not have solderable or exposed pins/terminals that are easily viewed. It is therefore difficult to determine visually whether or not the package is successfully soldered onto the printed circuit board (PCB). To resolve the issue of side-lead wetting of leadless packaging for automotive and commercial component manufacturers, the wettable-flank process was developed. The wettable flanks on the VQFN package provide a visual indicator of solderability and thereby lower the inspection time and manufacturing costs.

The CC2640R2F-Q1 device is assembled using an automotive-grade VQFN package with wettable flanks.