ZHCSXM5A December 2024 – April 2025 ADC3664-SP
PRODUCTION DATA
| 寄存器 地址 | 寄存器数据 | |||||||
|---|---|---|---|---|---|---|---|---|
| A[11:0] | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| 0x00 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 复位 |
| 0x07 | IF_MAPPER_SEL | 0 | IF_SEL_EN | IF_MODE_SEL | ||||
| 0x08 | 0 | 0 | 0 | 0 | 0 | PDN_A | PDN_B | PDN_ GLOBAL |
| 0x09 | 0 | 0 | 0 | 0 | PDN_DA1 | PDN_DA0 | PDN_DB1 | PDN_DB0 |
| 0x0E | SYNC_ PIN_EN | SPI_SYNC_ VAL | SYNC_SRC_SEL | 0 | CTRL_MODE | REF_SEL | SE_CLK_EN | |
| 0x11 | 0 | 0 | 0 | 0 | 0 | DLL_PDN | 0 | 0 |
| 0x13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | FUSE_LD |
| 0x14 | PAT_DATA[7:0] | |||||||
| 0x15 | PAT_DATA[15:8] | |||||||
| 0x16 | TP1_MODE | TP0_MODE | PAT_DATA_[17:16] | |||||
| 0x19 | FCLK_SRC | 0 | 0 | FCLK_DIV | 0 | 0 | 0 | TOG_FCLK |
| 0x1A | 0 | HALF_ SWING_EN | 0 | 0 | 0 | 0 | 0 | 0 |
| 0x1B | RES_ SEL_EN | 20B_EN | RES_SEL | 0 | 0 | 0 | ||
| 0x1E | 0 | 0 | 0 | 0 | LVDS_DATA_DEL | LVDS_DCLK_DEL | ||
| 0x20 | FCLK_PAT[7:0] | |||||||
| 0x21 | FCLK_PAT[15:8] | |||||||
| 0x22 | 0 | SCR_EN | 0 | 0 | FCLK_PAT[19:16] | |||
| 0x24 | 0 | 0 | AVG_EN | DDC_INP_SEL | DSP_EN | DDC_EN | 0 | |
| 0x25 | DDC_ MUX_EN | DEC_FACTOR | DDC_MODE | 0 | 0 | 0 | ||
| 0x26 | DDC0_GAIN | NCO0_RES | 0 | DDC1_GAIN | NCO1_RES | 0 | ||
| 0x27 | 0 | 0 | 0 | IQ0_ORDER | Q0_DEL | 0 | 0 | 0 |
| 0x2A | FCW0[7:0] | |||||||
| 0x2B | FCW0[15:8] | |||||||
| 0x2C | FCW0[23:16] | |||||||
| 0x2D | FCW0[31:24] | |||||||
| 0x2E | 0 | 0 | 0 | IQ1_ORDER | Q1_DEL | 0 | 0 | 0 |
| 0x31 | FCW1[7:0] | |||||||
| 0x32 | FCW1[15:8] | |||||||
| 0x33 | FCW1[23:16] | |||||||
| 0x34 | FCW1[31:24] | |||||||
| 0x39..0x60 | BIT_MAPPER_A | |||||||
| 0x61..0x88 | BIT_MAPPER_B | |||||||
| 0x8F | 0 | 0 | 0 | 0 | 0 | 0 | FORMAT_A | 0 |
| 0x92 | 0 | 0 | 0 | 0 | 0 | 0 | FORMAT_B | 0 |
| 0x244 | 0 | 0 | DCLKIN_ VCM |
0 | 0 | 0 | 0 | 0 |