ZHCSKL4 December 2019 ADC3421-Q1
PRODUCTION DATA.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CUSTOM PATTERN[3:0] | 0 | 0 | 0 | 0 | |||
| R/W-0h | W-0h | W-0h | W-0h | W-0h | |||
| LEGEND: R/W = Read/Write; W = Write only; -n = value after reset |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-4 | CUSTOM PATTERN[3:0] | R/W | 0h | These bits set the 12-bit custom pattern (bits 3-0) for all channels. |
| 3-0 | 0 | W | 0h | Must write 0. |