ZHCSZ33 October 2025 DRV8311-Q1
PRODUCTION DATA
| 参数 | 测试条件 | 最小值 | 典型值 | 最大值 | 单位 | |
|---|---|---|---|---|---|---|
| 电源 | ||||||
| IVMQ | VM 睡眠模式电流 | VVM = 12V,nSLEEP = 0,TA = 25°C | 1.5 | 3 | µA | |
| nSLEEP = 0,TA = 125°C | 9 | µA | ||||
| IVMS | VM 待机模式电流 | VVM = 12V,nSLEEP = 1,INHx = INLx = 0,SPI =“关闭”,TA = 25°C | 7 | 12 | mA | |
| nSLEEP = 1,INHx = INLx = 0,SPI =“关闭” | 8 | 12 | mA | |||
| IVM | VM 工作模式电流 | VVM = 12V,nSLEEP = 1,fPWM = 25kHz,TA = 25°C | 10 | 13 | mA | |
| VVM = 12V,nSLEEP = 1,fPWM = 200kHz,TA = 25°C | 12 | 14 | mA | |||
| nSLEEP =1,fPWM = 25kHz | 10 | 15 | mA | |||
| nSLEEP =1,fPWM = 200kHz | 12 | 15 | mA | |||
| VAVDD | 模拟稳压器电压 | VVM > 4V,VVIN_AVDD > 4.5V,0mA ≤ IAVDD ≤ 100mA | 3.15 | 3.3 | 3.45 | V |
| VAVDD | VVM > 3.5V,3.5V ≤VVIN_AVDD ≤ 4.5V,0mA ≤ IAVDD ≤ 35mA | 3 | 3.3 | 3.6 | V | |
| VAVDD | 2.5V ≤ VVIN_AVDD ≤ 3.5V,0mA ≤ IAVDD ≤ 10mA | 2.2 | VIN_AVDD-0.3 | 3.4 | V | |
| VAVDD | VVM < 4V,VVIN_AVDD > 4.5V,0mA ≤ IAVDD ≤ 40mA | 3 | 3.3 | 3.6 | V | |
| VAVDD | VVM < 3.5V,3.5V ≤VVIN_AVDD ≤ 4.5V,0mA ≤ IAVDD ≤ 20mA | 3 | 3.3 | 3.6 | V | |
| IAVDD_LIM | 外部模拟稳压器电流限制 | 148 | 200 | 250 | mA | |
| IAVDD | 外部模拟稳压器负载 | VVM > 4V,VVIN_AVDD > 4.5V | 100 | mA | ||
| VVM < 4V,VVIN_AVDD > 4.5V | 40 | mA | ||||
| VVM > 3.5V,3.6V ≤VVIN_AVDD ≤ 4.5V | 35 | mA | ||||
| VVM < 3.5V,3.6V ≤VVIN_AVDD ≤ 4.5V | 20 | mA | ||||
| 2.5V ≤VVIN_AVDD ≤ 3.6V | 10 | mA | ||||
| CAVDD | AVDD 引脚上的电容 | IAVDD ≤ 25mA; | 0.7 | 1 | 7 | µF |
| IAVDD ≥ 25mA; | 3.3 | 4.7 | 7 | µF | ||
| RAVDD | AVDD 输出电压调节 | VVIN_AVDD > 4.5V;IAVDD ≤ 20mA; | -3 | 3 | % | |
| VVIN_AVDD > 4.5V;20mA ≤ IAVDD ≤ 40mA; | -2 | 2 | % | |||
| VVIN_AVDD > 4.5V;IAVDD ≥ 40mA; | -3 | 3 | % | |||
| VVCP | 电荷泵稳压器电压 | VCP,以 VM 为基准 | 3 | 5 | 5.6 | V |
| tWAKE | 唤醒时间 | VVM > VUVLO,nSLEEP = 1 以使输出就绪 | 1 | 3 | ms | |
| tWAKE_CSA | CSA 的唤醒时间 | 当 nSLEEP = 1 时,VCSAREF > VCSAREF_UV 以使 SOx 就绪 | 30 | 50 | µs | |
| tSLEEP | 关断时间 | nSLEEP = 0 至驱动器进入三态 | 100 | 200 | µs | |
| tRST | 复位脉冲时间 | nSLEEP = 0 复位故障的周期 | 10 | 65 | µs | |
| 逻辑电平输入(INHx、INLx、nSLEEP、SCLK、SDI) | ||||||
| VIL | 输入逻辑低电平电压 | 0 | 0.6 | V | ||
| VIH | 输入逻辑高电平电压 | 1.65 | 5.5 | V | ||
| VHYS | 输入逻辑迟滞 | 100 | 300 | 660 | mV | |
| IIL | 输入逻辑低电平电流 | VPIN(引脚电压)= 0V | -1 | 1 | µA | |
| IIH | 输入逻辑高电流 | nSLEEP,VPIN(引脚电压)= 5V | 30 | µA | ||
| 其他引脚,VPIN(引脚电压)= 5V | 50 | µA | ||||
| RPD | 输入下拉电阻 | nSLEEP | 230 | 300 | kΩ | |
| 其他引脚 | 160 | 200 | kΩ | |||
| CID | 输入电容 | 30 | pF | |||
| 逻辑电平输入 (nSCS) | ||||||
| VIL | 输入逻辑低电平电压 | 0 | 0.6 | V | ||
| VIH | 输入逻辑高电平电压 | 1.5 | 5.5 | V | ||
| VHYS | 输入逻辑迟滞 | 200 | 500 | mV | ||
| IIL | 输入逻辑低电平电流 | VPIN(引脚电压)= 0V | 90 | µA | ||
| IIH | 输入逻辑高电流 | VPIN(引脚电压)= 5V | 70 | µA | ||
| RPU | 输入上拉电阻 | 48 | 90 | kΩ | ||
| CID | 输入电容 | 30 | pF | |||
| 四电平输入(GAIN、MODE、SLEW) | ||||||
| VL1 | 输入模式 1 电压 | 连接至 AGND | 0 | 0.21*AVDD | V | |
| VL2 | 输入模式 2 电压 | 47kΩ +/- 5% 连接至 GND | 0.25*AVDD | 0.5*AVDD | 0.55*AVDD | V |
| VL3 | 输入模式 3 电压 | 高阻态 | 0.606*AVDD | 0.757*AVDD | 0.909*AVDD | V |
| VL4 | 输入模式 4 电压 | 连接至 AVDD | 0.94*AVDD | AVDD | V | |
| RPU | 输入上拉电阻 | 至 AVDD | 48 | 70 | kΩ | |
| RPD | 输入下拉电阻 | 至 AGND | 160 | 200 | kΩ | |
| 开漏输出 (nFAULT) | ||||||
| VOL | 输出逻辑低电平电压 | IOD = -5mA | 0.4 | V | ||
| IOH | 输出逻辑高电平电流 | VOD = 5V | -1 | 1 | µA | |
| COD | 输出电容 | 30 | pF | |||
| 推挽式输出 (SDO) | ||||||
| VOL | 输出逻辑低电平电压 | IOP = -5mA,2.2V ≤ VAVDD ≤ 3V | 0 | 0.55 | V | |
| IOP = -5mA,3V ≤ VAVDD ≤ 3.6V | 0 | 0.5 | V | |||
| VOH | 输出逻辑高电压 | IOP = 5mA,2.2V ≤ VAVDD ≤ 3V | VAVDD - 0.86 | 3 | V | |
| IOP = 5mA,3V ≤ VAVDD ≤ 3.6V | VAVDD - 0.5 | 3.6 | V | |||
| IOL | 输出逻辑低电平电流 | VOP = 0V | -1 | 1 | µA | |
| IOH | 输出逻辑高电平电流 | VOP = 5V | -1 | 1 | µA | |
| COD | 输出电容 | 30 | pF | |||
| 驱动器输出 | ||||||
| RDS(ON) | MOSFET 总导通电阻(高侧 + 低侧) | 6V ≥ VVM ≥ 3V,IOUT = 1A,TJ = 25°C | 300 | 350 | mΩ | |
| 6V ≥ VVM ≥ 3V,IOUT = 1A, TJ = 150°C | 450 | 500 | mΩ | |||
| VVM ≥ 6V,IOUT = 1A,TJ = 25°C | 210 | 265 | mΩ | |||
| VVM ≥ 6V,IOUT = 1A,TJ = 150°C | 330 | 375 | mΩ | |||
| SR | 相位引脚转换率从低切换到高(从 VM 的 20% 上升到 80%) | VVM = 12V;SLEW = 00b(SPI 型号)或 SLEW 引脚连接至 AGND(HW 型号) | 18 | 35 | 55 | V/us |
| SR | VVM = 12V;SLEW = 01b(SPI 型号)或 SLEW 引脚连接至 47kΩ +/- 5% 再连接至 AGND(HW 型号) | 35 | 75 | 100 | V/us | |
| SR | VVM = 12V;SLEW = 10b(SPI 型号)或 SLEW 引脚连接至 Hi-Z(HW 型号) | 90 | 180 | 225 | V/us | |
| SR | VVM = 12V;SLEW = 11b(SPI 型号)或 SLEW 引脚连接至 AVDD(HW 型号) | 140 | 230 | 355 | Vµs | |
| SR | 相位引脚转换率从高切换到低(从 VM 的 80% 下降到 20%) |
VVM = 12V;SLEW = 00b(SPI 型号)或 SLEW 引脚连接至 AGND(HW 型号) | 20 | 35 | 50 | V/us |
| VVM = 12V;SLEW = 01b(SPI 型号)或 SLEW 引脚连接至 47kΩ +/- 5% 再连接至 AGND(HW 型号) | 35 | 75 | 100 | V/us | ||
| VVM = 12V;SLEW = 10b(SPI 型号)或 SLEW 引脚连接至 Hi-Z(HW 型号) | 80 | 180 | 225 | V/us | ||
| VVM = 12V;SLEW = 11b(SPI 型号)或 SLEW 引脚连接至 AVDD(HW 型号) | 125 | 270 | 350 | V/us | ||
| tDEAD | 输出死区时间(高电平到低电平/低电平到高电平) | VVM = 12V,SLEW = 00b(SPI 型号)或 SLEW 引脚连接至 AGND(HW 型号),DEADTIME = 000b,仅握手 | 500 | 1200 | ns | |
| VVM = 12V,SLEW = 01b(SPI 型号)或 SLEW 引脚连接至 47kΩ +/- 5% 再连接至 AGND(HW 型号),DEADTIME = 000b,仅握手 | 450 | 760 | ns | |||
| VVM = 12V,SLEW = 10b(SPI 型号)或 SLEW 引脚连接至 Hi-Z(HW 型号),DEADTIME = 000b,仅握手 | 425 | 720 | ns | |||
| VVM = 12V,SLEW = 11b(SPI 型号)或 SLEW 引脚连接至 AVDD(HW 型号),DEADTIME = 000b;仅握手 | 425 | 710 | ns | |||
| VVM = 12V,DEADTIME = 001b | 200 | 540 | ns | |||
| VVM = 12V,DEADTIME = 010b | 400 | 550 | ns | |||
| VVM = 12V,DEADTIME = 011b | 600 | 760 | ns | |||
| VVM = 12V,DEADTIME = 100b | 800 | 900 | ns | |||
| VVM = 12V,DEADTIME = 101b | 1000 | 1100 | ns | |||
| VVM = 12V,DEADTIME = 110b | 1200 | 1300 | ns | |||
| VVM = 12V,DEADTIME = 111b | 1400 | 1500 | ns | |||
| tPD | 传播延迟(高侧/低侧开/关) | INHx = 1 至 OUTx 切换,VVM = 12V,SLEW = 00b(SPI 型号)或 SLEW 引脚连接至 AGND(HW 型号) | 1000 | 1500 | ns | |
| INHx = 1 至 OUTx 切换,VVM = 12V,SLEW = 01b(SPI 型号)或 SLEW 引脚连接至 47kΩ +/- 5% 再连接至 AGND(HW 型号) | 650 | 1100 | ns | |||
| INHx = 1 至 OUTx 切换,VVM = 12V,SLEW = 10b(SPI 型号)或 SLEW 引脚连接至 Hi-Z(HW 型号) | 550 | 950 | ns | |||
| INHx = 1 至 OUTx 切换,VVM = 12V,SLEW = 11b(SPI 型号)或 SLEW 引脚连接至 AVDD(HW 型号) | 500 | 910 | ns | |||
| tMIN_PULSE | 最小输出脉冲宽度 | SLEW = 11b | 500 | ns | ||
| 电流检测放大器 | ||||||
| GCSA | 电流检测增益(SPI 器件) | CSA_GAIN = 00(SPI 型号)或 GAIN 引脚连接至 AGND(HW 型号) | 0.25 | V/A | ||
| CSA_GAIN = 01(SPI 型号)或 GAIN 引脚连接至 47kΩ +/- 5% 再连接至 GND(HW 型号) | 0.5 | V/A | ||||
| CSA_GAIN = 10(SPI 型号)或 GAIN 引脚连接至 Hi-Z(HW 型号) | 1 | V/A | ||||
| CSA_GAIN = 11(SPI 型号)或 GAIN 引脚连接至 AVDD(HW 型号) | 2 | V/A | ||||
| GCSA_ERR | 电流检测增益误差 | TJ = 25°C,IPHASE < 2.5A,VM ≥ 6V | -5 | 4 | % | |
| TJ = 25°C,IPHASE > 2.5A,VM ≥ 6V | -5 | 5 | % | |||
| IPHASE < 2.5A,VM ≥ 6V | -5.5 | 5.5 | % | |||
| IPHASE > 2.5A,VM ≥ 6V | -7 | 7 | % | |||
| IMATCH | A、B 和 C 相之间的电流检测增益误差匹配 | TJ = 25°C | -5 | 5 | % | |
| -5 | 5 | % | ||||
| FSPOS | 满标量程正电流测量 | 5 | A | |||
| FSNEG | 满标量程负电流测量 | -5 | A | |||
| VLINEAR | SOX 输出电压线性范围 | 0.25 | VCSAREF – 0.25 | V | ||
| IOFFSET_RT | 电流检测偏移低侧电流输入(室温) | TJ = 25°C,相电流 = 0A,GCSA = 0.25V/A | -50 | 50 | mA | |
| TJ = 25°C,相电流 = 0A,GCSA = 0.5V/A | -50 | 50 | mA | |||
| TJ = 25°C,相电流 = 0A,GCSA = 1V/A | -30 | 30 | mA | |||
| TJ = 25°C,相电流 = 0A,GCSA = 2V/A | -30 | 30 | mA | |||
| IOFFSET | 以低侧电流输入为基准的电流检测偏移 | 相电流 = 0A,GCSA = 0.25V/A | -70 | 70 | mA | |
| 相电流 = 0A,GCSA = 0.5V/A | -50 | 50 | mA | |||
| 相电流 = 0A,GCSA = 1V/A | -50 | 50 | mA | |||
| 相电流 = 0A,GCSA = 2V/A | -50 | 50 | mA | |||
| tSET | 至 ±1% 的趋稳时间,SOx 引脚上为 30pF | SOx 上的阶跃 = 1.2V,GCSA = 0.25V/A | 1 | μs | ||
| SOx 上的阶跃 = 1.2V,GCSA = 0.5V/A | 1 | μs | ||||
| SOx 上的阶跃 = 1.2V,GCSA = 1V/A | 1 | μs | ||||
| SOx 上的阶跃 = 1.2V,GCSA = 2V/A | 1 | μs | ||||
| VDRIFT | 漂移失调电压 | 相电流 = 0A | -150 | 150 | µA/℃ | |
| ICSAREF | CSAREF 输入电流 | CSAREF = 3.0V | 1.7 | 3 | mA | |
| 保护电路 | ||||||
| VUVLO | 电源欠压锁定 (UVLO) | VM 上升 | 2.6 | 2.7 | 2.8 | V |
| VM 下降 | 2.5 | 2.6 | 2.7 | V | ||
| VUVLO_HYS | 电源欠压锁定迟滞 | 上升至下降阈值 | 60 | 125 | 210 | mV |
| tUVLO | 电源欠压抗尖峰脉冲时间 | 5 | 7.5 | 13 | µs | |
| VVINAVDD_UV | AVDD 电源输入欠压锁定 (VINAVDD_UV) | VIN_AVDD 上升 | 2.6 | 2.7 | 2.8 | V |
| VIN_AVDD 下降 | 2.5 | 2.6 | 2.7 | V | ||
| VVINAVDD_UV_HYS | AVDD 电源输入欠压锁定磁滞 | 上升至下降阈值 | 100 | 125 | 150 | mV |
| tVINAVDD_UV | AVDD 电源输入欠压抗尖峰脉冲时间 | 2.5 | 4 | 5 | µs | |
| VCPUV | 电荷泵欠压锁定(相对于 VM 的电压) | VCP 上升 | 2 | 2.3 | 2.5 | V |
| VCP 下降 | 2 | 2.2 | 2.4 | V | ||
| VCPUV_HYS | 电荷泵欠压锁定磁滞 | 上升至下降阈值 | 65 | 100 | 125 | mV |
| tCPUV | 电荷泵欠压锁定抗尖峰脉冲时间 | 0.2 | 0.5 | µs | ||
| VCSAREF_UV | CSA 基准欠压锁定 | VCSAREF 上升 | 1.68 | 1.8 | 1.95 | V |
| VCSAREF_UV | CSA 基准欠压锁定 | VCSAREF 下降 | 1.6 | 1.7 | 1.85 | V |
| VCSAREF_UV_HYS | CSA 基准欠压锁定磁滞 | 上升至下降阈值 | 70 | 90 | 110 | mV |
| VAVDD_UV | 模拟稳压器欠压锁定 | VAVDD 上升 | 1.8 | 2 | 2.2 | V |
| VAVDD 下降 | 1.7 | 1.8 | 1.95 | V | ||
| IOCP | 过流保护跳变点 | OCP_LVL = 0(SPI 型号)或 MODE 引脚连接至 AGND 或 MODE 引脚连接至 Hi-Z(HW 型号) | 5.8 | 9 | 11.5 | A |
| OCP_LVL = 1(SPI 型号)或 MODE 引脚连接至 AVDD 或 MODE 引脚连接至 47kΩ +/- 5% 再连接至 AGND(HW 型号) | 3.4 | 5 | 7.5 | A | ||
| tBLANK | 过流保护消隐时间(SPI 型号) | OCP_TBLANK = 00b | 0.2 | µs | ||
| OCP_TBLANK = 01b | 0.5 | µs | ||||
| OCP_TBLANK = 10b | 0.8 | µs | ||||
| OCP_TBLANK = 10b | 1 | µs | ||||
| tBLANK | 过流保护消隐时间(HW 型号) | 0.2 | µs | |||
| tOCP_DEG | 过流保护抗尖峰脉冲时间(SPI 型号) | OCP_DEG = 00b | 0.2 | µs | ||
| OCP_DEG = 01b | 0.5 | µs | ||||
| OCP_DEG = 10b | 0.8 | µs | ||||
| OCP_DEG = 11b | 1 | µs | ||||
| tOCP_DEG | 过流保护抗尖峰脉冲时间(HW 型号) | 1 | µs | |||
| tRETRY | 过流保护重试时间(SPI 型号) | FAST_RETRY = 00b | 0.24 | 0.5 | 0.65 | ms |
| FAST_RETRY = 01b | 0.7 | 1 | 1.2 | ms | ||
| FAST_RETRY = 10b | 1.6 | 2 | 2.2 | ms | ||
| FAST_RETRY = 11b | 4.4 | 5 | 5.3 | ms | ||
| SLOW_RETRY = 00b | 390 | 500 | 525 | ms | ||
| SLOW_RETRY = 01b | 840 | 1000 | 1050 | ms | ||
| SLOW_RETRY = 10b | 1700 | 2000 | 2200 | ms | ||
| SLOW_RETRY = 11b | 4400 | 5000 | 5400 | ms | ||
| tRETRY | 过流保护重试时间(HW 型号) | 5 | ms | |||
| TOTW | 热警告温度 | 芯片温度 (TJ) 上升 | 170 | 178 | 185 | °C |
| TOTW_HYS | 热警告迟滞 | 芯片温度 (TJ) | 25 | 30 | °C | |
| TTSD | 热关断温度 | 芯片温度 (TJ) 上升 | 180 | 190 | 200 | °C |
| TTSD_HYS | 热关断磁滞 | 芯片温度 (TJ) | 25 | 30 | °C | |
| TTSD | 热关断温度 (LDO) | 芯片温度 (TJ) 上升 | 180 | 190 | 200 | °C |
| TTSD_HYS | 热关断迟滞 (LDO) | 芯片温度 (TJ) | 25 | 30 | °C | |
| PWM 输出精度 (tSPI) | ||||||
| RPWM | 输出 PWM 分辨率 | PWM 频率 = 20kHz | 10 | 位 | ||
| APWM | 输出 PWM 精度 | VVM < 4.5V,禁用 PWM_SYNC 和时钟调优 | -7.5 | 7.5 | % | |
| VVM > 4.5V,禁用 PWM_SYNC 和时钟调优 | -4 | 4 | % | |||
| 启用 PWM_SYNC 且禁用时钟调优 | -1 | 1 | % | |||
| 禁用 PWM_SYNC 且 SPISYNC_ACRCY = 11b | -2 | 2 | % | |||
| 禁用 PWM_SYNC 且 SPISYNC_ACRCY = 10b | -1 | 1 | % | |||
| 禁用 PWM_SYNC 且 SPISYNC_ACRCY = 01b | -1 | 1 | % | |||
| 禁用 PWM_SYNC 且 SPISYNC_ACRCY = 00b | -1 | 1 | % | |||