TIDUEY0A November   2020  – December 2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Li-ion Cell Formation Equipment
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 System Design Theory
      1. 2.2.1 Feedback Controller
      2. 2.2.2 DC/DC Start-Up
      3. 2.2.3 High-Resolution PWM Generation
      4. 2.2.4 Output Inductor and Capacitor Selection
      5. 2.2.5 Current and Voltage Feedback
    3. 2.3 Highlighted Products
      1. 2.3.1 TMS320F28P650DK
      2. 2.3.2 ADS9324
      3. 2.3.3 INA630
      4. 2.3.4 UCC27284
      5. 2.3.5 REF50E
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software
      1. 3.2.1 Opening the Project Inside Code Composer Studio
      2. 3.2.2 Project Structure
      3. 3.2.3 Software Flow Diagram
    3. 3.3 Test Setup
      1. 3.3.1 Hardware Setup to Test Bidirectional Power Flow
      2. 3.3.2 Hardware Setup to Tune the Current and Voltage Loop
      3. 3.3.3 Hardware Setup for Current and Voltage Calibration
      4. 3.3.4 Lab Variables Definitions
      5. 3.3.5 Test Procedure
        1. 3.3.5.1 Lab 1. Open-Loop Current Control Single Phase
          1. 3.3.5.1.1 Setting Software Options for Lab 1
          2. 3.3.5.1.2 Building and Loading the Project and Setting up Debug Environment
          3. 3.3.5.1.3 Running the Code
        2. 3.3.5.2 Lab 2. Closed Loop Current Control Single Channel
          1. 3.3.5.2.1 Setting Software Options for Lab 2
          2. 3.3.5.2.2 Building and Loading the Project and Setting up Debug Environment
          3. 3.3.5.2.3 Run the Code
        3. 3.3.5.3 Lab 3. Open Loop Voltage Control Single Channel
          1. 3.3.5.3.1 Setting Software Options for Lab 3
          2. 3.3.5.3.2 Building and Loading the Project and Setting up Debug Environment
          3. 3.3.5.3.3 Running the Code
        4. 3.3.5.4 Lab 4. Closed Loop Current and Voltage Control Single Channel
          1. 3.3.5.4.1 Setting Software Options for Lab 4
          2. 3.3.5.4.2 Building and Loading the Project and Setting up Debug Environment
          3. 3.3.5.4.3 Running the Code
        5. 3.3.5.5 Lab 5. Closed Loop Current and Voltage Control Four Channels
          1. 3.3.5.5.1 Setting Software Options for Lab 5
          2. 3.3.5.5.2 Building and Loading the Project and Setting up Debug Environment
          3. 3.3.5.5.3 Running the Code
        6. 3.3.5.6 Calibration
    4. 3.4 Test Results
      1. 3.4.1 Current Load Regulation
      2. 3.4.2 Voltage Load Regulation
      3. 3.4.3 Current Linearity Test
      4. 3.4.4 Voltage Loop Linearity Test
      5. 3.4.5 Bidirectional Current Switching Time
      6. 3.4.6 Current Step Response
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.2.4 Output Inductor and Capacitor Selection

The value of the output capacitor and the ESR of the capacitor determine the output voltage ripple and load transient performance. This capacitor is designed to achieve the best possible output voltage ripple and load transient performance.

Equation 8 calculates the duty cycle of the buck current.

Equation 1. D=VOUTmaxVINmin×Efficiency=6 V12 V×90%=55.5%

Inductor ripple current is typically defined between 0.2 to 0.3 times the output current. Since the control loop needs to be fast, the inductor can be picked at smaller value. So 0.2 is selected as the ripple current coefficient. Full scale of 12 A is used in the calculation for some margin, so the inductor ripple current is estimated to be
2.4 A.

The worst-case scenario for Continuous Conduction Mode (CCM) in a buck converter occurs when Toff is at the maximum as represented in Equation 2.

Equation 2. ∆IL=VOUTmax×(1-D)fS×L

Solving the equation, the inductor value needs to be higher than 4.45 μH. An inductor with smaller inductance has a larger saturation current. In this design, a 4.7 μH inductor is selected. Equation 3 calculates the actual inductor current.

Equation 3. ∆IL=6 V×(1-0.555)250 kHz×4.7 μH≅2.27 A

Equation 4 calculates the output capacitance without considering the ESR.

Equation 4. Cout=ΔIL8×fsw×∆VOut_Ripple

The output voltage ripple is targeted to be 0.1% of the maximum output voltage, which is 6 mV. Plug in Equation 4, and the output capacitor is calculated at 192 μF. In this design, four 47 μF and two 1-μF ceramic capacitors are placed in parallel to match the capacitance.

The ESR requirement of output capacitors is also critical to determine the total output voltage ripple. Higher ESR can lead to an overall higher output voltage ripple. To calculate the ESR requirements, use the following equation to calculate the voltage ripple due to the capacitor alone and due to ESR alone:

Equation 5. Vo_pp =(ΔIL8×Cout×fsw)2+(ΔIL×RESR)2
Equation 6. 6 mV=(2.4 A8×190 μF×250 kHz)2+(2.4 A×Resr)2

Solve for Resr ≅ 0.5 mΩ. This value can be achieved with paralleling ceramic capacitors; each capacitor has around 1.5 mΩ of ESR at 250 kHz switching frequency. Paralleling the connection of the capacitor can reduce the overall ESR to less than 1 mΩ.