SPRUIY5A February   2021  – July 2021 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442

 

  1.   Trademarks
  2. 1 Stackup
  3. 2 Floorplan Component Placement
  4. 3 Critical Interfaces Impact Placement
  5. 4 Route Critical Interfaces First
  6. 5 Route SERDES Interfaces First
  7. 6 Route DDR Signals
    1. 6.1 Address, Command, Control, and Clock Group Routes
    2. 6.2 Data Group Routes
  8. 7 Complete Power Decoupling
  9. 8 Route Lowest Priority Interfaces
  10. 9 References
  11. 10Revision History

3 Critical Interfaces Impact Placement

Placement of the SoC and some of the components or connectors is also dictated by some of the highest performance interfaces. Additionally, due to the PCB losses at multi-gigabit rates, there are routing distance limits that may also limit component placement.