SPRADS1 June   2025 F29H850TU

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Hardware Security Module
    2. 1.2 Flash Programming Fundamentals
    3. 1.3 High-Level Flow
    4. 1.4 Flow Chart
  5. 2Flash-Based UART SBL with FOTA
    1. 2.1 Implementation
    2. 2.2 Triggering a Bank Swap
  6. 3FOTA_Example_Application
    1. 3.1 led_blinky_cpu1.c
    2. 3.2 Combining the Flash-Based SBL with the FOTA_Example_Application
    3. 3.3 Adding a CPU3 Application
  7. 4Host Application: UART Flash Programmer
    1. 4.1 Overview
  8. 5Example Usage
    1. 5.1 Loading the SBL onto the Device
      1. 5.1.1 Loading by CCS (JTAG)
      2. 5.1.2 Loading via UART Boot and the UART Flash Kernel
    2. 5.2 Example UART Loading Process
  9. 6FAQ
    1. 6.1 General
    2. 6.2 Application Load
  10. 7Summary
  11. 8References

6.1 General

Question: Can users program the data flash while performing a FOTA upgrade?

Answer: The data flash (FLC1.B4) can be programmed while executing program code in FLC1.B0 and FLC1.B1 or FLC1.B2 and FLC1.B3. However, do not attempt to simultaneously program FLC1.B4 while another bank pair within FLC1 is being programmed. For example, if the device is performing a FOTA upgrade in FLC1.B2 and FLC1.B3 and executing program code in FLC1.B0 and FLC1.B1, then programming of FLC1.B2 and FLC1.B3 must not be interrupted with the intent of programming the data flash (FLC1.B4). If users are programming the data flash in an ISR during this FOTA scenario, then the ISR verifies that there is not an ongoing flash operation (program or erase). If so, then the ISR must wait until the previous command has completed before attempting another operation. The Fapi_checkFsmForReady() function of the F29H85x Flash API can be used for this. There is a caveat such that after programming to the data flash in the ISR, these must set the protection masks back to 0x0 (or whatever is being used to program the main array [FLC1.B2 and FLC1.B3]). This is because after a successful program or erase operation, the protection masks are set back to 0xFFFF_FFFF (enabling write and erase protection for all sectors). If the interrupt occurs after the main array protection mask configuration, but before the program command is issued, then this is a flash state machine error unless reconfigured.

Question: Is a firmware upgrade necessary every time the bank mode is changed?

Answer: Users are free to switch the device bank mode at any point (before or after a firmware upgrade), but users have to account for any changes in the flash memory map. For example, when changing from bank mode 1 to bank mode 3, CPU1 no longer has 2MB of flash allocated to the active region. Instead, CPU1 only has 1MB available for the active region. Thus, any active firmware that is in flash no longer allocated to CPU1 cannot be executed after the bank mode switch and a firmware upgrade needs to be performed.

Question: If users cannot find the flash-based UART SBL with FOTA project, then?

Answer:

DeviceBuild ConfigurationsLocation

F29H85x

BANKMODE_1

BANKMODE_3

BANKMODE_1_CP

BANKMODE_3_CP

mcu_sdk_f29h85x\examples\driverlib\single_core\flash\flash_based_UART_SBL_with_FOTA