SPRADS1 June   2025 F29H850TU

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Hardware Security Module
    2. 1.2 Flash Programming Fundamentals
    3. 1.3 High-Level Flow
    4. 1.4 Flow Chart
  5. 2Flash-Based UART SBL with FOTA
    1. 2.1 Implementation
    2. 2.2 Triggering a Bank Swap
  6. 3FOTA_Example_Application
    1. 3.1 led_blinky_cpu1.c
    2. 3.2 Combining the Flash-Based SBL with the FOTA_Example_Application
    3. 3.3 Adding a CPU3 Application
  7. 4Host Application: UART Flash Programmer
    1. 4.1 Overview
  8. 5Example Usage
    1. 5.1 Loading the SBL onto the Device
      1. 5.1.1 Loading by CCS (JTAG)
      2. 5.1.2 Loading via UART Boot and the UART Flash Kernel
    2. 5.2 Example UART Loading Process
  9. 6FAQ
    1. 6.1 General
    2. 6.2 Application Load
  10. 7Summary
  11. 8References

3.3 Adding a CPU3 Application

Although this example project does not provide a CPU3 application, there are only a few minor modifications needed to add CPU3 compatibility. The flash-based SBL supports CPU3 firmware upgrades, but the CPU1 application is responsible for programming the firmware and taking CPU3 out of reset. To demonstrate this, the FOTA_Example_Application can be modified to take CPU3 out of reset. The steps required for CPU1 to take CPU3 out of reset are as follows:

  1. Configure the address and link for CPU3 to boot to
  2. Configure the NMI address for CPU3
  3. Bring CPU3 out of reset

Figure 3-13 shows the source code that can be added to have CPU1 take CPU3 out of reset. This occurs after device initialization but before interrupt initialization. Refer to any of the multi-core example in the F29H85x SDK for more details.

CPU1 Code Required to Take CPU3 Out of Reset Figure 3-13 CPU1 Code Required to Take CPU3 Out of Reset
Attention:

Additionally, the BANKMODE_3 build configuration must be used for CPU3 upgrades.