SPRADS1 June   2025 F29H850TU

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Hardware Security Module
    2. 1.2 Flash Programming Fundamentals
    3. 1.3 High-Level Flow
    4. 1.4 Flow Chart
  5. 2Flash-Based UART SBL with FOTA
    1. 2.1 Implementation
    2. 2.2 Triggering a Bank Swap
  6. 3FOTA_Example_Application
    1. 3.1 led_blinky_cpu1.c
    2. 3.2 Combining the Flash-Based SBL with the FOTA_Example_Application
    3. 3.3 Adding a CPU3 Application
  7. 4Host Application: UART Flash Programmer
    1. 4.1 Overview
  8. 5Example Usage
    1. 5.1 Loading the SBL onto the Device
      1. 5.1.1 Loading by CCS (JTAG)
      2. 5.1.2 Loading via UART Boot and the UART Flash Kernel
    2. 5.2 Example UART Loading Process
  9. 6FAQ
    1. 6.1 General
    2. 6.2 Application Load
  10. 7Summary
  11. 8References

2.2 Triggering a Bank Swap

In this section, the details of how a bank swap for CPU1 or CPU3 is triggered in bank mode 1 or bank mode 3 are described. First, the basics of the Bank Management region of flash are important to understand. The Flash BANKMGMT Region Address Map section of the F29H85x and F29P58x Real-Time Microcontrollers data sheet shows the memory map of the bank management region in all four bank modes. This document focuses on the Flash BANKMGMT Region Address Mapping (BANKMODE = 1) table, which is applicable for bank mode 1.

As shown below, the BANKMGMT region in bank mode 1 is all mapped to CPU1. There are four regions listed in the table and these are split evenly between the active (FRI1) and inactive (FRI3) region of CPU1 flash. However, the BANKMGMT regions in FRI1.RP1 and FRI3.RP1 are unused. These regions are reserved for determining the SWAP value for CPU3. Since CPU3 does not have any flash allocated in Mode 1, these regions are unused.

Table 2-1 Flash BANKMGMT Region Address Mapping (BANKMODE = 1)
FRI READ PORT SIZE START ADDRESS END
ADDRESS		 FLASH BANKS (SWAP = 0) FLASH BANKS (SWAP = 1)
FRI-1 (CPU1 program) RP0 4KB 0x10D80000 0x10D80FFF FLC1.B0/B1 FLC1.B2/B3
RP1 4KB 0x10D84000 0x10D84FFF FLC2.B0/B1 FLC2.B2/B3
RP2 4KB 0x10D88000 0x10D88FFF N/A N/A
RP3 4KB 0x10D8C000 0x10D8CFFF N/A N/A
FRI-2 (CPU3 program)#d7e950 RP0 4KB 0x10D90000 0x10D90FFF N/A N/A
RP1 4KB 0x10D94000 0x10D94FFF N/A N/A
FRI-3 (Update region) RP0 4KB 0x10D98000 0x10D98FFF FLC1.B2/B3 FLC1.B0/B1
RP1 4KB 0x10D9C000 0x10D9CFFF FLC2.B2/B3 FLC2.B0/B1

The BANKMGMT region of each bank pair contains three fields that are used to manage bank status and firmware updates. The BANKMGMT Sectors section of the F29H85x Technical Reference Manual (TRM) describes these fields in detail.

  1. BANK_STATUS[63:0] (Offset 0x00): This field specifies whether the bank contents are currently valid or invalid. A valid bank pair has a status value of 0x55555555_55555555. If both banks are inactive, the device is unable to execute Flash code and can fail to boot. If both banks have valid active statuses, then the current active bank is determined by BANK_UPDATE_CTR.
  2. BANK_UPDATE_CTR[63:0] (Offset 0x08): This is a 64-bit decrementing counter value that is used to determine the most recent firmware revision. The counter has a value of 0xFFFFFFFF_FFFFFFFF when shipped from the TI factory. When both bank pairs have valid status values, the BANK_UPDATE_CTR for each bank pair is compared against the other to determine the most recent firmware revision. The bank pair with the lower counter value is determined to be the most recent revision.
  3. BANKMODE[63:0] (Offset 0x10): This field only exists in FLC1 BANKMGMT regions (for CPU1). The BANKMODE field configures the device bankmode and is loaded into the SSU_GEN_REGS.BANKMODE register at device boot. After BANKMODE is configured, the boot ROM then reads the value of each bank pair's BANK_UPDATE_CTR to determine whether CPUxSWAP is enabled.

Figure 2-1 is an example BANKMGMT region of a device in bank mode 1.

BANKMGMT Region BANKMGMT Region Figure 2-1 BANKMGMT Region

The 0x10D80000 region (FRI1 RP0) has the lowest BANK_UPDATE_CTR. Thus, this is selected as the active BANKMGMT region for CPU1 which puts the device in bank mode 1 (0x06). The inactive region (FRI3 RP0) has the BANKMODE field set to mode 3 (0x0C), but BANK_UPDATE_CTR is higher than FRI1 RP0 so this is not used.

Another register that can be used to track the active or inactive bank status is the SSU_GEN_REG.BANKMAP registers. Refer to the data-sheet or TRM for exact definitions. Notice that the CPU1SWAP field is set to 0x36. This is one of the two possible values and indicates which physical flash banks are active.

BANKMAP Before Swapping Figure 2-2 BANKMAP Before Swapping

To trigger a swap, update the inactive BANKMGMT region (FRI3) to decrement the BANK_UPDATE_COUNTER such that this is lower than the value found in the active region (FRI1 RP0). As mentioned above, this can be done with CCS by the flash plugin or can be done manually using the flash API. In the flash-based SBL project, the ProgramInactiveBankManagement() function is used to do this in ex4_uart_boot_cpu1.c. At a high-level, here is the implementation of the function:

  1. First, the function determines the appropriate bank management address to program (CPU1 or CPU3)
  2. Erase the inactive bank management sector
  3. Program the inactive BANKMODE field with the desired bank mode
  4. Program the inactive BANK_STATUS and BANK_UPDATE_CTR fields
    1. The BANK_UPDATE_CTR field is programmed with a value that is one less than the BANK_UPDATE_CTR field in the active BANKMGMT region
CAUTION: TI recommends to program the BANKMODE field before programming the BANK_STATUS BANK_UPDATE_CTR fields just in case of an interruption (power loss, and so forth.) during this process. If the device loses power after BANK_STATUS and BANK_UPDATE_CTR fields are programmed without a valid BANKMODE field, then the device does not boot properly.

After calling this function, the inactive BANKMGMT region is updated.

Inactive BANKMGMT Updated for Swap Figure 2-3 Inactive BANKMGMT Updated for Swap

The BANK_UPDATE_COUNTER is now lower than the counter in the active region and the BANKMODE field is now mode 1 (0x6). After triggering a device reset, these fields are in the active BANKMGMT address space (FRI1 RP0).

Active BANKMGMT Region Figure 2-4 Active BANKMGMT Region

Additionally, the BANKMAP.CPU1SWAP register also indicates that a swap has occurred.

BANKMAP Swap Figure 2-5 BANKMAP Swap

The CPU1SWAP value is now 0xC9, as opposed to 0x36. This indicates that the swap has successfully occurred and the physical flash banks associated with the CPU1 flash active address space have swapped.