SPRACT3A September   2020  – June 2026 F29H850TU , F29H859TU-Q1 , F29P329SM-Q1 , TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Secure Flash Boot Overview
  6. 3 CMAC Authentication
  7. 4 Secure Flash Boot Options
  8. 5 Secure Flash Boot Flow
  9. 6 C2000Ware Example Details
  10. 7 Authenticating Flash Code Beyond 16 KB
  11. 8 Debug Resources
  12. 9 Additional Information and Points to Consider
  13. 10Alignment of C2000 CMAC Algorithm to OpenSSL
    1. 10.1 C28x Memory and Binary File Byte Ordering
    2. 10.2 Flash Binary Byte Ordering
    3. 10.3 CMAC Key Byte Ordering
    4. 10.4 CMAC Output Alignment Procedure
    5. 10.5 Worked Example
    6. 10.6 Summary of Differences
  14. 11References
  15. 12Revision History

4 Secure Flash Boot Options

Table 4-1 shows the different Primary Secure Flash Boot options available on the three cores and their corresponding configurations. The Extended Secure Boot which is initiated by the application code, is explained in Section 7. For more details, see the ROM Code and Peripheral Booting chapter of the TMS320F2838x Technical Reference Manual [1].

Table 4-1 Secure Flash Boot Mode Configuration Details

Secure Boot Option ((1))

BOOTDEFx/BOOTMODE Value ((2))

Flash Entry Point ((3))

CPU1/CPU2 Entry Address

CPU1/CPU2 128-Bit Golden CMAC Tag Location

CM Entry Address

CM 128-Bit Golden CMAC Tag Location
Option 0 0x0A Sector 0 0x00080000 0x00080002 0x00200000 0x00200004
Option 1 0x2A Sector 4 0x00088000 0x00088002 0x00210000 0x00210004
Option 2 0x4A Sector 8 0x000A8000 0x000A8002 0x00250000 0x00250004
Option 3 0x6A Sector 13 0x000BE000 0x000BE002 0x0027C000 0x0027C004
(1) The secure boot options can be independently chosen for CPU1/CPU2/CM.
(2) For CPU1, BOOTDEFx field is part of the Zx-BOOTDEF-LOW/ Zx-BOOTDEF-HIGH CPU1 USER OTP memory locations. For CPU2/CM, BOOTMODE field is part of the CPU1TOCPU2IPCBOOTMODE/CPU1TOCMIPCBOOTMODE registers respectively populated by CPU1 application code.
(3) The secure boot feature is applicable only on Zone1 and hence the chosen flash sector(s) have to be configured as Zone1-EXEONLY. Also, irrespective of the sector size, the Primary Secure Flash boot operates on only the first 16KB of the selected sector. For example, Sector 4 and Sector 8 are 64KB each, but only the first 16KB is considered.