SPRACT3A September 2020 – June 2026 F29H850TU , F29H859TU-Q1 , F29P329SM-Q1 , TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1
The C28x CPU is 16-bit word-addressed (not byte-addressable). Each C28x word is 16 bits wide. In the binary file, each 16-bit word is stored little-endian (low byte at lower file offset).
A C28x uint32_t value 0xAABBCCDD stored at word address N:
C28x word address N: value = 0xCCDD (low 16 bits)
C28x word address N+1: value = 0xAABB (high 16 bits)
Binary file bytes:
offset 2k+0: 0xDD ← low byte of word[N]
offset 2k+1: 0xCC ← high byte of word[N]
offset 2k+2: 0xBB ← low byte of word[N+1]
offset 2k+3: 0xAA ← high byte of word[N+1]
So uint32_t 0xAABBCCDD appears in the binary file as: DD CC BB AA
The "LB 0x081BC8" instruction at C28x 0x080000:
C28x word 0x080000: 0x4800 → binary bytes: 00 48
C28x word 0x080001: 0x1BC8 → binary bytes: C8 1B
Binary file at offset 0: 00 48 C8 1B