SLVAFX0B October   2024  – March 2026 TLV702 , TLV703 , TLV755P , TPS74401 , TPS7A13 , TPS7A14 , TPS7A20 , TPS7A21 , TPS7A49 , TPS7A52 , TPS7A53 , TPS7A53B , TPS7A54 , TPS7A57 , TPS7A74 , TPS7A83A , TPS7A84A , TPS7A85A , TPS7A91 , TPS7A92 , TPS7A94 , TPS7A96 , TPS7H1111-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction to Linear Regulator Turn-On Time
  5. 2What Impacts the LDO Rise Time?
    1. 2.1 Simple Use Cases
      1. 2.1.1 Case 1: LDO With an NR Filter But Without CFF Capacitance
      2. 2.1.2 Case 2: NR Filter With a CFF Capacitance
      3. 2.1.3 Fast-Charge Circuitry
      4. 2.1.4 Non-Preferred LDO Behavior
        1. 2.1.4.1 Applied Voltage Bias
        2. 2.1.4.2 Fast Charge Current Tolerance
        3. 2.1.4.3 Internal Error Amplifier Offset Voltage
        4. 2.1.4.4 Temperature Impacts the Fast-Charge Current Source
        5. 2.1.4.5 Error Amplifier Common Mode Voltage
        6. 2.1.4.6 Reference Voltage (VREF) Ramp Time Dominates the Turn-On Time
        7. 2.1.4.7 Start-Up During Dropout Mode
        8. 2.1.4.8 Large Values of COUT Induce Internal Current Limit
        9. 2.1.4.9 Limitations of Large-Signal LDO Bandwidth
    2. 2.2 Specific Use Cases and Examples
      1. 2.2.1 Case 3: Precision Voltage Reference With RNR/SS and Parallel IFC Fast Charge
      2. 2.2.2 Case 4: Precision Voltage Reference With IFC Fast Charge and No RNR/SS
      3. 2.2.3 Case 5: Precision Current Reference
      4. 2.2.4 Case 6: Soft-Start Timing
  6. 3System Considerations
    1. 3.1 Inrush Current Calculation
    2. 3.2 Inrush Current Analysis
    3. 3.3 Maximum Slew Rate
  7. 4Summary
  8. 5Conclusion
  9. 6References

Non-Preferred LDO Behavior

The following conditions can affect the total turn-on time of an LDO regulator.