SLVAF52B July   2021  – November 2021 AFE8092 , TPS62913

 

  1.   Trademarks
  2. 1Introduction
  3. 2System Description
    1. 2.1 AFE80xx Noise and Ripple Requirements
    2. 2.2 AFE80xx Supply Settling and EVM for TDD Operations
    3. 2.3 Block Diagram
      1. 2.3.1 Proposed Power Architecture
      2. 2.3.2 Power Sequencing
    4. 2.4 Power Supply Design Consideration
  4. 3Tests and Results
    1. 3.1 Test Methodology
      1. 3.1.1 Phase Noise (Transmit) (dBc/Hz)
      2. 3.1.2 EVM for Frequency Division Multiplexing (FDD) Mode(%)
      3. 3.1.3 EVM for TDD Mode(%)
      4. 3.1.4 Receive (RX) Spectrum (Power Supply Spurious)
      5. 3.1.5 Power Efficiency
    2. 3.2 Test Conditions
    3. 3.3 Test Results
      1. 3.3.1 Phase Noise
      2. 3.3.2 EVM for FDD Mode
      3. 3.3.3 EVM for TDD Mode
      4. 3.3.4 RX Spectrum
      5. 3.3.5 Power Efficiency
  5. 4Conclusion
  6. 5References
  7. 6Revision History

3.1.3 EVM for TDD Mode(%)

EVM is measured to plot the deviation of constellation points for 5G NR spectrum configured for TDD mode. Noise, spurious signals, distortion and phase noise degrades the EVM. In TDD mode AFE8092 all 8 transmit and 8 receive pairs are toggled with 10-us guard time period. The TDD toggling causes dynamic load current variations on power supply rail resulting into load transient ripple coupling into signal spectrum.

Along with power supply improvements, AFE80xx features unique programmability to group TX or RX channel time staggering each TX and RX channel by fixed delay thereby reducing the load step to be seen by DC-DC output hence reducing supply overshoot and undershoot magnitude. Additionally, AFE80xx also features internal bias voltage configuration for TX channel to minimize supply modulation into RF DAC output.