SLVAF52B July   2021  – November 2021 AFE8092 , TPS62913

 

  1.   Trademarks
  2. 1Introduction
  3. 2System Description
    1. 2.1 AFE80xx Noise and Ripple Requirements
    2. 2.2 AFE80xx Supply Settling and EVM for TDD Operations
    3. 2.3 Block Diagram
      1. 2.3.1 Proposed Power Architecture
      2. 2.3.2 Power Sequencing
    4. 2.4 Power Supply Design Consideration
  4. 3Tests and Results
    1. 3.1 Test Methodology
      1. 3.1.1 Phase Noise (Transmit) (dBc/Hz)
      2. 3.1.2 EVM for Frequency Division Multiplexing (FDD) Mode(%)
      3. 3.1.3 EVM for TDD Mode(%)
      4. 3.1.4 Receive (RX) Spectrum (Power Supply Spurious)
      5. 3.1.5 Power Efficiency
    2. 3.2 Test Conditions
    3. 3.3 Test Results
      1. 3.3.1 Phase Noise
      2. 3.3.2 EVM for FDD Mode
      3. 3.3.3 EVM for TDD Mode
      4. 3.3.4 RX Spectrum
      5. 3.3.5 Power Efficiency
  5. 4Conclusion
  6. 5References
  7. 6Revision History

6 Revision History

Changes from Revision A (August 2021) to Revision B (November 2021)

  • Placeholder to test rev. B revision history.Go
  • Changed External Clock Synchronization figure.Go

Changes from Revision * (July 2021) to Revision A (August 2021)

  • Updated image and the description.Go
  • Added an additional reference.Go