SLLA683 July 2026 ISO6021 , ISO6041 , ISO6420 , ISO6420-Q1 , ISO6421 , ISO6421-Q1 , ISO6431 , ISO6431-Q1 , ISO6440 , ISO6440-Q1 , ISO6441 , ISO6441-Q1 , ISO6442 , ISO6442-Q1 , ISO6462 , ISO6463
Table 3-3 summarizes the advantages of the 12-DFP with respect to the traditional 8-DWV and 16-DW package for 2 channel devices. The 2 channel devices in a 12-DFP gain an extra functional pin per side which is utilized for new functionality in some digital isolator families.
| Package | Channel Count | Device ISO Rating | Creepage and Clearance (mm) | % area savings vs Traditional Package (8-DWV) | Area (mm2) | X (mm) | Y (mm) | Pin Pitch (mm | Z (mm) |
|---|---|---|---|---|---|---|---|---|---|
| (PCB land pattern lead to lead maximum) | (package body size maximum) | (height of package above PCB maximum) | |||||||
| 16-DW (Wide-SOIC) | 2 | Reinforced, Basic | >8 | -58% | 119.7 | 11.4 | 10.5 | 1.27 | 2.65 |
| 12-DFP (Wide-SSOP) | 2 | Reinforced | >8 | 41.4 | 10.9 | 3.8 | 0.5 | 2.65 | |
| 8-DWV (Wide-SOIC) (Traditional Package) | 2 | Reinforced | >8.5 | Traditional (Reference) | 75.6 | 12.7 | 5.95 | 1.27 | 2.8 |