SLAU298A November   2009  – May 2021

 

  1.   Trademarks
  2. 1ADS8555EVM-PDK Overview
    1. 1.1 ADS8555EVM-PDK Features
    2. 1.2 ADS8555EVM Features
  3. 2EVM Analog Interface
    1. 2.1 ADC Supply, Input, Voltage Reference, and Digital Connections
    2. 2.2 ADC Amplifier Drive
  4. 3Digital Interface
    1. 3.1 Parallel Interface
    2. 3.2 Serial Interface (SPI)
    3. 3.3 I2C Bus and EEPROM
    4. 3.4 Connections to the PHI Connector
  5. 4Power Supplies
    1. 4.1 External Power Connections and Test Points
    2. 4.2 Low-Dropout Regulator (TPS7A3001 for HVSS)
    3. 4.3 Low-Dropout Regulator (TPS7A4700 for AVDD, HVDD)
  6. 5Installing the ADS8555EVM Software
  7. 6ADS8555EVM Operation
    1. 6.1 Connecting the Hardware and Running the GUI
    2. 6.2 Jumper Settings for the ADS8555EVM
    3. 6.3 Modifying Hardware and Using Software to Evaluate Other Devices in the Family
    4. 6.4 EVM GUI Global Settings for ADC Control and Registers
    5. 6.5 Time Domain Display
    6. 6.6 Frequency Domain Display
    7. 6.7 Histogram Display
  8. 7Bill of Materials, Layout, and Schematics
    1. 7.1 Bill of Materials
    2. 7.2 Board Layout
    3. 7.3 Schematics
  9. 8Revision History

6.1 Connecting the Hardware and Running the GUI

  1. Set the jumpers according to Section 6.2.
  2. Physically connect P2 of the PHI to J10 of the ADS8555EVM. Install the screws to assure a robust connection.
  3. Connect the USB on the PHI to the computer first.
    1. LED D5 on the PHI lights up, indicating that the PHI is powered up.
    2. LEDs D1 and D2 on the PHI start blinking to indicate that the PHI is booted up and communicating with the PC; Figure 6-1 shows the resulting LED indicators.
  4. As shown in Figure 6-2, start the software GUI. Notice that the LEDs blink slowly when the FPGA firmware is loaded on the PHI. This process takes a few seconds, afterwards the AVDD and DVDD power supplies turn on.
  5. Connect the external ±15-V power supplies and GND to J1. This connection generates the AVDD, HVDD, and HVSS supplies (HVDD = 12 V, HVSS = –12 V, and AVDD = 5 V).
  6. Connect the signal generator. The default input range is ±10 V (or 10 Vpk). A common input signal applied is a sinusoidal 1-kHz, 9.9-Vpk signal with a 0-V offset. This signal is adjusted just below the full-scale range to avoid clipping.
GUID-20210429-CA0I-DW2W-KZNL-QL5KZBXQMMTR-low.gifFigure 6-1 ADS8555EVM Hardware Setup and LED Indicators
GUID-20210426-CA0I-SJVZ-1DQK-R5DGZSVJCVG4-low.gifFigure 6-2 Launch the EVM GUI Software