SLAA721E October   2016  – March 2020 MSP430FR5969 , MSP430FR5969-SP , MSP430FR5994 , MSP430FR6989

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Glossary
    2. 1.2 Conventions
  3. 2Implementation
    1. 2.1 Main
    2. 2.2 Application Manager
      1. 2.2.1 Bootloader and Application Detection
        1. 2.2.1.1 Forcing Bootloader Mode
        2. 2.2.1.2 Application Validation
        3. 2.2.1.3 Jumping to Application
      2. 2.2.2 Memory Assignment
      3. 2.2.3 Interrupt Vectors in FRAM Devices
    3. 2.3 Memory Interface (MI)
      1. 2.3.1 Dual Image Support
    4. 2.4 Communication Interface (CI)
      1. 2.4.1 Physical-DataLink (PHY-DL)
        1. 2.4.1.1 UART
        2. 2.4.1.2 SPI
        3. 2.4.1.3 CC110x
        4. 2.4.1.4 Comm Sharing
      2. 2.4.2 NWK-APP
        1. 2.4.2.1 BSL-Based Protocol
          1. 2.4.2.1.1 Security
          2. 2.4.2.1.2 BSL-Based Protocol Using CC110x
          3. 2.4.2.1.3 Examples Using UART or CC110x
  4. 3Customization of MSP430FRBoot
    1. 3.1 Predefined Customizations
  5. 4Building MSPBoot
    1. 4.1 LaunchPad™ Development Kit Hardware
    2. 4.2 CC110x Hardware
    3. 4.3 Software
      1. 4.3.1 Building the Target Software
      2. 4.3.2 Convert Application Output Images
      3. 4.3.3 Generating Linker Files
  6. 5Demo Using FRAM LaunchPad Development Kit as Host
    1. 5.1 Hardware
    2. 5.2 Building the Host Project
    3. 5.3 Running the Demo
  7. 6Porting the target side example projects to other MSP430FR devices
  8. 7References
  9. 8Revision History

Introduction

Expanding on the original theory behind MSPBoot – Main Memory Bootloader for MSP430™ Microcontrollers, many FRAM applications require a solution that allows for easy field upgrades. MSP430FRBoot has been designed to accomplish this task with any custom communication peripheral and entry sequence as defined by the user. Two different examples have been included to further demonstrate these capabilities. One example uses the UART protocol to create a simple two-wire communication link between devices, while the other example incorporates SPI buses and two CC110x devices to accomplish wireless over-the-air downloads. Above all, these solutions can maintain high performance, high integration, and ultra-low power in a cost-effective design.

MSP430 FRAM devices are equipped with the very useful UART Bootloader (BSL) which allows for a simple way to do field upgrades. Most MSP430 FRAM devices have a ROM-resident BSL that supports UART and cannot be modified to support I2C or other interfaces. The MSP430FRxxxx1 devices implement an I2C BSL solution instead of UART. Furthermore, the BSL cannot include custom entry sequences that might be required for application. For more information on the BSL, see the MSP430™ FRAM Devices Bootloader (BSL) User's Guide.

Given these limitations, it might be necessary to create a bootloader that resides in main memory and still allows for an easy implementation of the application. This application report describes the implementation of the MSP430FRBoot bootloader with the following characteristics:

  • Small footprint (less than 4KB in size required)
  • 20-bit incorporation for large memory models
  • Supports the eUSCI peripherals offered on FRAM devices
  • UART communication offers the most simple wired interface using a small memory space.
  • SPI bus offers over-the-air downloads (using the CC110x) at a slightly larger footprint.
  • Different options that allow for customizable levels of robustness
  • Optional dual image support in case of communication interruption
  • Allows for use of all interrupts in application
  • Application can reuse the low-level drivers from the bootloader or implement its own drivers.
  • Configurable entry sequence
  • Optional validation of application using CRC-CCITT
  • Source code available, allowing for additional customizations

Source code for the bootloader with different sample configurations, application examples, and host examples are included to allow for easy testing, customization, and implementation. Knowledge of UART and SPI specifications as well as sub-1 GHz RF communication protocol is assumed.