ZHCSGC2I June   2017  – March 2024 UCC5310 , UCC5320 , UCC5350 , UCC5390

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Function
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications for D Package
    7. 6.7  Insulation Specifications for DWV Package
    8. 6.8  Safety-Related Certifications For D Package
    9. 6.9  Safety-Related Certifications For DWV Package
    10. 6.10 Safety Limiting Values
    11. 6.11 Electrical Characteristics
    12. 6.12 Switching Characteristics
    13. 6.13 Insulation Characteristics Curves
    14. 6.14 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Propagation Delay, Inverting, and Noninverting Configuration
      1. 7.1.1 CMTI Testing
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Supply
      2. 8.3.2 Input Stage
      3. 8.3.3 Output Stage
      4. 8.3.4 Protection Features
        1. 8.3.4.1 Undervoltage Lockout (UVLO)
        2. 8.3.4.2 Active Pulldown
        3. 8.3.4.3 Short-Circuit Clamping
        4. 8.3.4.4 Active Miller Clamp (UCC53x0M)
    4. 8.4 Device Functional Modes
      1. 8.4.1 ESD Structure
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Designing IN+ and IN– Input Filter
        2. 9.2.2.2 Gate-Driver Output Resistor
        3. 9.2.2.3 Estimate Gate-Driver Power Loss
        4. 9.2.2.4 Estimating Junction Temperature
      3. 9.2.3 Selecting VCC1 and VCC2 Capacitors
        1. 9.2.3.1 Selecting a VCC1 Capacitor
        2. 9.2.3.2 Selecting a VCC2 Capacitor
        3. 9.2.3.3 Application Circuits with Output Stage Negative Bias
      4. 9.2.4 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 PCB Material
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Certifications
    4. 12.4 接收文档更新通知
    5. 12.5 支持资源
    6. 12.6 Trademarks
    7. 12.7 静电放电警告
    8. 12.8 术语表
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

9.2.2.4 Estimating Junction Temperature

Use the equation below to estimate the junction temperature (TJ) of the UCC53x0 family.

Equation 12. GUID-3A497B0D-87D9-4907-861A-78A9DA006A3D-low.gif

where

  • TC is the UCC53x0 case-top temperature measured with a thermocouple or some other instrument.
  • ΨJT is the junction-to-top characterization parameter from the Thermal Information table.

Using the junction-to-top characterization parameter (ΨJT) instead of the junction-to-case thermal resistance (RθJC) can greatly improve the accuracy of the junction temperature estimation. The majority of the thermal energy of most ICs is released into the PCB through the package leads, whereas only a small percentage of the total energy is released through the top of the case (where thermocouple measurements are usually conducted). The RθJC resistance can only be used effectively when most of the thermal energy is released through the case, such as with metal packages or when a heat sink is applied to an IC package. In all other cases, use of RθJC will inaccurately estimate the true junction temperature. The ΨJT parameter is experimentally derived by assuming that the dominant energy leaving through the top of the IC will be similar in both the testing environment and the application environment. As long as the recommended layout guidelines are observed, junction temperature estimations can be made accurately to within a few degrees Celsius.