ZHCSKL1A December   2019  – May 2022 TUSS4440

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power-Up Characteristics
    6. 6.6  Transducer Drive
    7. 6.7  Receiver Characteristics
    8. 6.8  Echo Interrupt Comparator Characteristics
    9. 6.9  Digital I/O Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excitation Power Supply (VDRV)
      2. 7.3.2 Burst Generation
        1. 7.3.2.1 Burst Generation Diagnostics
      3. 7.3.3 Transformer Transducer Drive
      4. 7.3.4 Analog Front End
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 REG_USER Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Transformer Drive Configuration Options
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Transducer Driving Voltage
          2. 8.2.1.2.2 Transducer Driving Frequency
          3. 8.2.1.2.3 Transducer Pulse Count
          4. 8.2.1.2.4 Transformer Turns Ratio
          5. 8.2.1.2.5 Transformer Saturation Current and Main Voltage Rating
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10.1 Layout Guidelines

A minimum of two layers is required to accomplish a small-form factor ultrasonic module design. The layers should be separated by analog and digital signals. The pin map of the device is routed such that the power and digital signals are on the opposing side of the analog driver and receiver pins. Consider the following best practices for TUSS4440 device layout in order of descending priority:

  • Separating the grounding types is important to reduce noise at the AFE input of the TUSS4440. In particular, the transducer sensor ground, supporting driver, and return-path circuitry should have a separate ground before being connected to the main ground. Separating the sensor and main grounds through a ferrite bead is best practice, but not require. A copper-trace or 0-Ω short is also acceptable when bridging grounds.
  • The analog return path pins, INP and INN, are most susceptible to noise and therefore should be routed as short and directly to the transducer as possible. Ensure the INN capacitor is close to the pin to reduce the length of the ground wire.
  • The analog output pin trace should be routed as short and directly to an external ADC or microcontroller input to avoid signal-to-noise losses due to parasitic-effects or noise coupling onto the trace from external radiating aggressors.
  • In applications where protection from an ESD strike on the case of the transducer is important, ground routing of the capacitor on the INN pin should be separate from the device ground and connected directly with the shortest possible trace to the connector ground.
  • The analog drive pins can be high-current, high-voltage, or both and therefore the design limitation of the OUTA and OUTB pins is based on the copper trace profile. The driver pins are recommended to be as short and direct as possible when using a transformer to drive the primary windings with a high-current limit.
  • The decoupling capacitors for the VDD and VPWR pins should be placed as close to the pins as possible.
  • Any digital communication should be routed away from the analog receiver pins. TXD, RXD, SCLK, NCS, IO1, IO2, OUT3, and OUT4 pins should be routed on the opposite side of the PCB, away from of the analog signals.