ZHCSRU8 February 2024
PRODUCTION DATA
The TPSM8S6B24 supports the 100kHz, 400kHz, and 1MHz bus speeds. Connection for the PMBus interface must follow the high power DC specifications given in section 3.1.3 in the SMBus specification V2.0 for the 400kHz bus speed or the low power DC specifications in section 3.1.2. The complete SMBus specification is available from the SMBus website.
The PMBus interface pins PMB_CLK, PMB_DATA, and SMB_ALRT require external pullup resistors to a 1.8V to 5.5V termination. Pullup resistors must be sized to meet the minimize rise-time required for the desired PMBus clock speed but must not source more current than the lowest-rated CLK, DATA, or SMB_ALRT pin on the bus when the bus voltage is forced to 0.4V. The TPSM8S6B24 supports a minimum of 20mA of sink current on PMB_CLK, PMB_DATA, and SMB_ALRT.