ZHCSQM0 December   2022 TPSM82816

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Precise Enable (EN)
      2. 8.3.2 Output Discharge
      3. 8.3.3 COMP/FSET
      4. 8.3.4 MODE/SYNC
      5. 8.3.5 Spread Spectrum Clocking (SSC)
      6. 8.3.6 Undervoltage Lockout (UVLO)
      7. 8.3.7 Power-Good Output (PG)
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (PSM)
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current Limit and Short-Circuit Protection
      5. 8.4.5 Soft Start / Tracking (SS/TR)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Output Voltage
        2. 9.2.2.2 Feedforward Capacitor
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Voltage Tracking
      2. 9.3.2 Synchronizing to an External Clock
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
        1. 9.5.2.1 Thermal Consideration
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 第三方产品免责声明
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 接收文档更新通知
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 术语表
  11. 11Mechanical, Packaging, and Orderable Information

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Overview

The TPSM82816 synchronous switch mode DC/DC converter power modules are based on a fixed-frequency peak current-mode control topology. The control loop is internally compensated. To optimize the bandwidth of the control loop to the wide range of output capacitance that can be used with the TPSM82816, one of two internal compensation settings can be selected. See COMP/FSET. The compensation setting is selected either by a resistor from COMP/FSET to GND or by the logic state of this pin. The regulation network achieves fast and stable operation with small external components and low-ESR ceramic output capacitors.

The device supports forced fixed frequency operation (FPWM) with the MODE/SYNC pin tied to a logic high level. The frequency is defined as either 2.25 MHz (internally fixed when COMP/FSET is tied to GND or VIN) or in a range of 1.8 MHz to 4 MHz (defined by a resistor from COMP/FSET to GND). Alternatively, the device can be synchronized to an external clock signal in a range from 1.8 MHz to 4 MHz, applied to the MODE/SYNC pin with no need for additional passive components. An internal PLL allows the device to change from internal clock to external clock during operation. The synchronization to the external clock is done on the falling edge of the clock applied at MODE/SYNC to the rising edge on the internal SW node. When the MODE/SYNC pin is set to a logic low level, the device operates in power save mode (PSM). At low output current, the device operates in PFM mode and automatically transitions to fixed-frequency PWM mode at higher output current. In PFM operation, the switching frequency decreases linearly based on the load to sustain high efficiency down to very low output current (see Power Save Mode Operation (PSM) for more details).