ZHCSQB8B July   2021  – October 2022 TPS38700-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device State Diagram
      2. 8.3.2 Built-In Self Test and Configuration Load
      3. 8.3.3 CLK32K
      4. 8.3.4 BACKUP State
      5. 8.3.5 FAILSAFE State
      6. 8.3.6 Transitioning Sequences
        1. 8.3.6.1 Sequence 1: Power Up
        2. 8.3.6.2 Sequence 2: Emergency Power Down
        3. 8.3.6.3 Sequence 3: Sleep Entry
        4. 8.3.6.4 Sequence 4: Sleep Exit
        5. 8.3.6.5 Sequence 5 & 6: Power Down from Active and Sleep States
        6. 8.3.6.6 Sequence 7: Sleep Exit due to NRST_IN
        7. 8.3.6.7 Sequence 8: RESET due to NRST_IN
        8. 8.3.6.8 Sequence 9: Failsafe Power Down
        9. 8.3.6.9 Output Sequencing
      7. 8.3.7 I2C
    4. 8.4 Register Map Table
      1. 8.4.1 Register Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Guidelines
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
      1.      Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Application Information

Modern SOC and FPGA devices typically have multiple power rails to provide power to the different blocks within the IC. Accurate voltage level and timing requirements are common and must be met in order to ensure proper operation of these devices. By utilizing TPS38700-Q1 along with a multichannel voltage supervisor, the power up and power down sequencing requirements as well as the core voltage requirements of the target SOC or FPGA device can be met. This design focuses on meeting the timing requirements for an SOC by using the TPS38700-Q1.