ZHCSQB8B July 2021 – October 2022 TPS38700-Q1
Modern SOC and FPGA devices typically have multiple power rails to provide power to the different blocks within the IC. Accurate voltage level and timing requirements are common and must be met in order to ensure proper operation of these devices. By utilizing TPS38700-Q1 along with a multichannel voltage supervisor, the power up and power down sequencing requirements as well as the core voltage requirements of the target SOC or FPGA device can be met. This design focuses on meeting the timing requirements for an SOC by using the TPS38700-Q1.