As the TCAN4572-Q1 supports low power sleep mode and uses a wake-up from the CAN bus mechanism called bus wake via RXD_INT Request (BWRR). Once this pattern is received, the TCAN4572-Q1 automatically switches to standby mode and inserts an interrupt onto the nINT and nWKRQ pins to indicate to a host microprocessor that the bus is active, and it must wake-up and service the TCAN4572-Q1. The low power receiver and bus monitor are enabled in sleep mode to allow for RXD_INT Wake Requests via the CAN bus. A wake-up request is output to the internal RXD_INT (driven low) as shown in Figure 7-8. The wake logic monitors RXD_INT for transitions (high to low) and reactivate the device to standby mode based on the RXD_INT Wake Request. The CAN bus terminals are weakly pulled to GND during this mode.

These devices use the wake-up pattern (WUP) from ISO 11898-2:2016 to qualify bus traffic into a request to wake the host microprocessor. The bus wake request is signaled to the integrated CAN FD controller by a falling edge and low corresponding to a “filtered” bus dominant on the RXD_INT terminal (BWRR).

The wake-up pattern (WUP) consists of :

• A filtered dominant bus of at least t_{WK_FILTER} followed by
• A filtered recessive bus time of at least t_{WK_FILTER} followed by
• A second filtered dominant bus time of at least t_{WK_FILTER}

Once the WUP is detected, the device starts issuing wake-up requests (BWRR) on the RXD_INT signal every time a filtered dominant time is received from the bus. The first filtered dominant initiates the WUP and the bus monitor is now waiting on a filtered recessive, other bus traffic does not reset the bus monitor. Once a filtered recessive is received, the bus monitor is now waiting on a filtered dominant and again, other bus traffic does not reset the bus monitor. Immediately upon receiving of the second filtered dominant the bus monitor recognizes the WUP and transition to BWRR output. Immediately upon verification receiving a WUP the device transitions the bus monitor into BWRR mode, and indicates all filtered dominant bus times on the RXD_INT internal signal by driving it low for the dominant bus time that is in excess of t_{WK_FILTER}, thus the RXD_INT output during BWRR matches the classical 8 pin CAN devices that used the single filtered dominant on the bus as the wake-up request mechanism from ISO 11898-2:2016.

For a dominant or recessive to be considered “filtered”, the bus must be in that state for more than t_{WK_FILTER} time. Due to variability in the t_{WK_FILTER} the following scenarios are applicable.

• Bus state times less than t_{WK_FILTER(MIN)} are never detected as part of a WUP, and thus no BWRR is generated.
• Bus state times between t_{WK_FILTER(MIN)} and t_{WK_FILTER(MAX)} can be detected as part of a WUP and a BWRR can be generated.
• Bus state times more than t_{WK_FILTER(MAX)} is always detected as part of a WUP, and thus, a BWRR is always be generated.

See Figure 7-7 for the timing diagram of the WUP.

The pattern and t_{WK_FILTER} time used for the WUP and BWRR prevents noise and bus stuck dominant faults from causing false wake requests while allowing any CAN or CAN FD message to initiate a BWRR. If the device is switched to normal mode or an under-voltage event occurs on V_CC the BWRR is lost. The WUP pattern must take place within the t_{WK_TIMEOUT} time otherwise the device is in a state waiting for the next recessive and then a valid WUP pattern.

Figure 7-7 Wake-up Pattern (WUP) and Bus Wake via RXD_INT Request (BWRR)

Figure 7-8 Example Timing Diagram with TXD_INT DTO

The device turns on the low speed clock when the first dominant is seen from an idle bus. Once a valid WUP has been detected, the high speed clock is requested to turn on.

Figure 7-9 CAN WUP Clock Requests