ZHCSE36D August 2015 – April 2018 LMK03328
PRODUCTION DATA.
The Fractional Divider Denominator value for PLL1 is set by registers PLL1_FRACDEN_BY2, PLL1_FRACDEN_BY1 and PLL1_FRACDEN_BY0.
Bit # | Field | Type | Reset | EEPROM | Description |
---|---|---|---|---|---|
[7:6] | RESERVED | - | - | N | Reserved. |
[5:0] | PLL1_DEN[21:16] | RW | 0x00 | Y | PLL1 Fractional Divider Denominator Byte 2. Bits 21 to 16. |